Issued Patents All Time
Showing 1–25 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12424257 | Memory devices with dual-side access circuits and methods for operating the same | Tung-Cheng Chang, Yu-Fan Lin, Ku-Feng Lin, Yih Wang | 2025-09-23 |
| 12417796 | Ferroelectric field-effect transistor (FeFET) memory | — | 2025-09-16 |
| 12412620 | Second word line combined with y-mux signal in high voltage memory program | Yoshitaka Yamauchi, Meng-Sheng Chang, Hiroki Noguchi | 2025-09-09 |
| 12386374 | Push-pull low-dropout (LDO) voltage regulator | Yen-Hsiang Huang | 2025-08-12 |
| 12387968 | Radical-activated etching of metal oxides | Chansyun David Yang, Chan-Lon Yang, Keh-Jeng Chang | 2025-08-12 |
| 12389806 | MRAM cell and MRAM | Yih Wang | 2025-08-12 |
| 12380950 | Non-volatile static random access memory (NVSRAM) with multiple magnetic tunnel junction cells | Yih Wang, Ku-Feng Lin, Jui-Che Tsai, Hiroki Noguchi, Fu-An Wu | 2025-08-05 |
| 12347505 | Memory device and operating method of the same | Gu-Huan Li, Tung-Cheng Chang, Chia-En Huang, Chun-Ying Lee, Yih Wang | 2025-07-01 |
| 12284804 | Memory devices, semiconductor devices, and methods of operations a memory device | Yih Wang, Meng-Sheng Chang, Jui-Che Tsai, Ku-Feng Lin, Yu-Wei Lin +7 more | 2025-04-22 |
| 12254923 | Nonvolatile SRAM | Jui-Che Tsai, Hiroki Noguchi, Yih Wang | 2025-03-18 |
| 12243599 | Merged bit lines for high density memory array | — | 2025-03-04 |
| 12230338 | Semiconductor memory devices with diode-connected MOS | Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee, Yih Wang | 2025-02-18 |
| 12218015 | Interferometer systems and methods for real time etch process compensation control | Chansyun David Yang, Chan-Lon Yang, Keh-Jeng Chang | 2025-02-04 |
| 12217822 | Memory device with source line control | Yih Wang | 2025-02-04 |
| 12210368 | Bias generating devices and methods for generating bias | Yoshitaka Yamauchi, Yih Wang | 2025-01-28 |
| 12211918 | Nanostructured channel regions for semiconductor devices | Chansyun David Yang, Keh-Jeng Chang, Chan-Lon Yang | 2025-01-28 |
| 12190949 | Memory circuit and method of operating the same | Shao-Ting Wu, Yu-Fan Lin | 2025-01-07 |
| 12190986 | Sense amplifier for coupling effect reduction | Ku-Feng Lin, Jui-Che Tsai, Yih Wang | 2025-01-07 |
| 12183397 | Memory circuits and devices, and methods thereof | Yih Wang, Tung-Cheng Chang, Gu-Huan Li, Chia-En Huang, Chun-Ying Lee | 2024-12-31 |
| 12148487 | High-density and high-voltage-tolerable pure core memory cell | Ku-Feng Lin, Meng-Sheng Chang | 2024-11-19 |
| 12094558 | Multiple stack high voltage circuit for memory | Meng-Sheng Chang, Tung-Cheng Chang, Yih Wang | 2024-09-17 |
| 12087378 | Bit selection for power reduction in stacking structure during memory programming | Meng-Sheng Chang, Yoshitaka Yamauchi | 2024-09-10 |
| 12027583 | Gate structures for semiconductor devices | Chansyun David Yang, Keh-Jeng Chang, Chan-Lon Yang | 2024-07-02 |
| 12002528 | Memory device and operating method of the same | Gu-Huan Li, Tung-Cheng Chang, Chia-En Huang, Chun-Ying Lee, Yih Wang | 2024-06-04 |
| 11984164 | Non-volatile static random access memory (nvSRAM) with multiple magnetic tunnel junction cells | Yih Wang, Ku-Feng Lin, Jui-Che Tsai, Hiroki Noguchi, Fu-An Wu | 2024-05-14 |