Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11791834 | Semiconductor circuit and method for providing configurable reference voltage with full-scale range | Yu-Jie Huang, Chien-Chun Tsai | 2023-10-17 |
| 10644865 | Read-write data translation technique of asynchronous clock domains | Shu-Chun Yang, Wen-Hung Huang | 2020-05-05 |
| 10277215 | Digital controlled delay line | Meng-Ting Tsai, Chien-Chun Tsai, Wen-Hung Huang, Yu-Chi Chen | 2019-04-30 |
| 10164758 | Read-write data translation technique of asynchronous clock domains | Shu-Chun Yang, Wen-Hung Huang | 2018-12-25 |
| 9571073 | 3D clock distribution circuits and methods | — | 2017-02-14 |
| 9520867 | Duty cycle detection and correction circuit in an integrated circuit | — | 2016-12-13 |
| 9331845 | System and method for chip system timing compensation | Shu-Chun Yang, Wei-Chih Chen | 2016-05-03 |
| 9059691 | Duty cycle detection and correction circuit in an integrated circuit | — | 2015-06-16 |
| 9000823 | 3D clock distribution circuits and methods | — | 2015-04-07 |
| 8847655 | Binary control arrangement and method of making and using the same | — | 2014-09-30 |