JB

Jaskirat Bindra

TSMC: 6 patents #3,824 of 12,232Top 35%
📍 San Jose, CA: #9,474 of 32,062 inventorsTop 30%
🗺 California: #93,399 of 386,348 inventorsTop 25%
Overall (All Time): #813,839 of 4,157,543Top 20%
6
Patents All Time

Issued Patents All Time

Showing 1–6 of 6 patents

Patent #TitleCo-InventorsDate
11239163 Tapering discrete interconnection for an integrated circuit (IC) Kumar Lalgudi 2022-02-01
11201610 Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs Kumar Lalgudi 2021-12-14
10819325 Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs Kumar Lalgudi 2020-10-27
10748849 Tapering discrete interconnection for an integrated circuit (IC) Kumar Lalgudi 2020-08-18
10476490 Selectable delay buffers and logic cells for dynamic voltage scaling in ultra low voltage designs Kumar Lalgudi 2019-11-12
10276497 Tapering discrete interconnection for an integrated circuit (IC) Kumar Lalgudi 2019-04-30