Issued Patents All Time
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12334144 | Memory device including booster circuit for tracking word line | — | 2025-06-17 |
| 12119050 | Variable delay word line enable | — | 2024-10-15 |
| 11916550 | Multiplexing latch circuit | — | 2024-02-27 |
| 11727970 | Memory device for generating word line signals having varying pulse widths | — | 2023-08-15 |
| 11451217 | Match-slave latch with skewed clock | — | 2022-09-20 |
| 11296703 | Multiplexing latch circuit and method | — | 2022-04-05 |
| 11250907 | Variable delay word line enable | — | 2022-02-15 |
| 11004488 | Memory device for generating word line signals having varying pulse widths | — | 2021-05-11 |
| 10943645 | Memory device with a booster word line | — | 2021-03-09 |
| 10892007 | Variable delay word line enable | — | 2021-01-12 |
| 10878867 | Memory cell distance tracking circuits and methods | Atul Katoch | 2020-12-29 |
| 10777261 | Bi-directional input/output enable signal propagation structure and method | — | 2020-09-15 |
| 10541685 | Multiplexing latch circuit and method | — | 2020-01-21 |
| 10515677 | Memory device for generating word line signals having varying pulse widths | — | 2019-12-24 |
| 10276223 | Memory device for generating word line signals having varying pulse widths | — | 2019-04-30 |
| 10157665 | Word-line enable pulse generator, SRAM and method for adjusting word-line enable time of SRAM | — | 2018-12-18 |
| 10110232 | Multiplexer and latch system | — | 2018-10-23 |
| 9786363 | Word-line enable pulse generator, SRAM and method for adjusting word-line enable time of SRAM | — | 2017-10-10 |