Issued Patents All Time
Showing 351–375 of 414 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5748478 | Output management of processing in a manufacturing plant | Yirn-Sheng Pan | 1998-05-05 |
| 5744387 | Method for fabricating dynamic random access memory with a flat topography and fewer photomasks | — | 1998-04-28 |
| 5741741 | Method for making planar metal interconnections and metal plugs on semiconductor substrates | — | 1998-04-21 |
| 5736459 | Method to fabricate a polysilicon stud using an oxygen ion implantation procedure | — | 1998-04-07 |
| 5733808 | Method for fabricating a cylindrical capacitor for a semiconductor device | — | 1998-03-31 |
| 5731130 | Method for fabricating stacked capacitors on dynamic random access memory cells | — | 1998-03-24 |
| 5728618 | Method to fabricate large capacitance capacitor in a semiconductor circuit | — | 1998-03-17 |
| 5728617 | Method for fabricating vertical walled stacked capacitors for dram cells | — | 1998-03-17 |
| 5728614 | Method to improve the topography of a field oxide region | — | 1998-03-17 |
| 5716883 | Method of making increased surface area, storage node electrode, with narrow spaces between polysilicon columns | — | 1998-02-10 |
| 5716882 | Method for forming a DRAM capacitor by forming a trench in a polysilicon layer | — | 1998-02-10 |
| 5710074 | Increased surface area of an STC structure via the use of a storage node electrode comprised of polysilicon mesas and polysilicon sidewall spacers | — | 1998-01-20 |
| 5710078 | Method to improve the contact resistance of bit line metal structures to underlying polycide structures | — | 1998-01-20 |
| 5710075 | Method to increase surface area of a storage node electrode, of an STC structure, for DRAM devices | — | 1998-01-20 |
| 5705417 | Method for forming self-aligned silicide structure | — | 1998-01-06 |
| 5705438 | Method for manufacturing stacked dynamic random access memories using reduced photoresist masking steps | — | 1998-01-06 |
| 5702967 | Method of fabricating a deep submicron MOSFET device using a recessed, narrow polysilicon gate structure | — | 1997-12-30 |
| 5696395 | Dynamic random access memory with fin-type stacked capacitor | — | 1997-12-09 |
| 5693562 | Method for forming a barrier metal film with conformal step coverage in a semiconductor integrated circuit | — | 1997-12-02 |
| 5688706 | Method for fabricating a MOSFET device, with local channel doping, self aligned to a selectively deposited tungsten gate | — | 1997-11-18 |
| 5681773 | Method for forming a DRAM capacitor | — | 1997-10-28 |
| 5681774 | Method of fabricating a toothed-shape capacitor node using a thin oxide as a mask | — | 1997-10-28 |
| 5677218 | Method of fabricating FET device with narrow gate length | — | 1997-10-14 |
| 5677217 | Method for fabricating a mosfet device, with local channel doping and a titanium silicide gate | — | 1997-10-14 |
| 5677216 | Method of manufacturing a floating gate with high gate coupling ratio | — | 1997-10-14 |