Issued Patents All Time
Showing 1–1 of 1 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6040223 | Method for making improved polysilicon FET gate electrodes having composite sidewall spacers using a trapezoidal-shaped insulating layer for more reliable integrated circuits | Meng-Chang Liu, Jyh-Feng Lin, Ming-Shu Yen, Su-Ying Su, Chien-Hung Lin | 2000-03-21 |