Issued Patents All Time
Showing 26–36 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10262870 | Fin field effect transistor (FinFET) device structure and method for forming the same | Chang-Yin Chen, Chia-Yang Liao, Bo-Feng Young | 2019-04-16 |
| 10090396 | Method for fabricating metal gate devices and resulting structures | Po-Chi Wu, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao | 2018-10-02 |
| 9818648 | Method for forming Fin field effect transistor (FinFET) device structure | Yi-Cheng Chao, Po-Chi Wu, Jung-Jui Li | 2017-11-14 |
| 9818841 | Semiconductor structure with unleveled gate structure and method for forming the same | Che-Cheng Chang, Po-Chi Wu, Yi-Cheng Chao | 2017-11-14 |
| 9799565 | Method for forming semiconductor device structure with gate | Po-Chi Wu, Wen-Han Fang | 2017-10-24 |
| 9793269 | Semiconductor device and method of manufacture | Po-Chi Wu, Che-Cheng Chang | 2017-10-17 |
| 9660084 | Semiconductor device structure and method for forming the same | Po-Chi Wu, Jung-Jui Li, Ya-Lan Chang, Yi-Cheng Chao | 2017-05-23 |
| 9583485 | Fin field effect transistor (FinFET) device structure with uneven gate structure and method for forming the same | Che-Cheng Chang, Po-Chi Wu, Yi-Cheng Chao | 2017-02-28 |
| 9577067 | Metal gate and manufuacturing process thereof | Wei-Shuo Ho, Chang-Yin Chen, Tsung-Yu Chiang | 2017-02-21 |
| 9418994 | Fin field effect transistor (FinFET) device structure | Yi-Cheng Chao, Po-Chi Wu, Jung-Jui Li | 2016-08-16 |
| 7917244 | Method and system for reducing critical dimension side-to-side tilting error | Cheng-Ming Lin | 2011-03-29 |