Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Stephen Lee Smith — 36 Patents

SYSynopsys: 19 patents #23 of 2,302Top 1%
Motorola: 12 patents #905 of 14,142Top 7%
Intel: 4 patents #8,538 of 30,777Top 30%
Palo Alto, CA: #597 of 9,675 inventorsTop 7%
California: #13,468 of 386,348 inventorsTop 4%
Overall (All Time): #92,222 of 4,157,543Top 3%
36 Patents All Time
Stephen Lee Smith has been granted 36 US patents while listed as an inventor at Synopsys. The first was granted in 1980 and the most recent in February 2022. Stephen Lee Smith ranks #92,222 of 4,157,543 US inventors in our database (top 2.2%). Patent records list Stephen Lee Smith in Palo Alto, CA, US.

Issued Patents All Time

Showing 1–25 of 36 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11249813 Adaptive parallelization for multi-scale simulation Michael C. Shaughnessy-Culver, Jie Liu, Victor Moroz, Yong-Seog Oh, Pratheep Balasingam +1 more 2022-02-15 $130,532,000
11068631 First principles design automation tool Yong-Seog Oh, Michael C. Shaughnessy-Culver, Jie Liu, Victor Moroz, Pratheep Balasingam +1 more 2021-07-20 $249,912,000
10831957 Simulation scaling with DFT and non-DFT Jie Liu, Victor Moroz, Michael C. Shaughnessy-Culver, Yong-Seog Oh, Pratheep Balasingam +1 more 2020-11-10 $31,326,000
10776560 Mapping intermediate material properties to target properties to screen materials Victor Moroz, Yong-Seog Oh, Michael C. Shaughnessy-Culver, Jie Liu, Terry Sylvan Kam-Chiu Ma 2020-09-15 $28,550,000
10756212 FinFET with heterojunction and improved channel control Victor Moroz, Qiang Lu 2020-08-25 $62,304,000
10706209 Estimation of effective channel length for FinFETs and nano-wires Victor Moroz, Yong-Seog Oh, Michael C. Shaughnessy-Culver, Jie Liu 2020-07-07 $43,617,000
10685156 Multi-scale simulation including first principles band structure extraction Jie Liu, Victor Moroz, Michael C. Shaughnessy-Culver, Yong-Seog Oh, Pratheep Balasingam +1 more 2020-06-16 $75,276,000
10606968 Atomic scale grid for modeling semiconductor structures and fabrication processes Victor Moroz 2020-03-31 $25,306,000
10516725 Characterizing target material properties based on properties of similar materials Victor Moroz, Yong-Seog Oh, Jie Liu, Michael C. Shaughnessy-Culver, Terry Sylvan Kam-Chiu Ma 2019-12-24
10489212 Adaptive parallelization for multi-scale simulation Michael C. Shaughnessy-Culver, Jie Liu, Victor Moroz, Yong-Seog Oh, Pratheep Balasingam +1 more 2019-11-26
10417373 Estimation of effective channel length for FinFETs and nano-wires Victor Moroz, Yong-Seog Oh, Michael C. Shaughnessy-Culver, Jie Liu 2019-09-17
10402520 First principles design automation tool Yong-Seog Oh, Michael C. Shaughnessy-Culver, Jie Liu, Victor Moroz, Pratheep Balasingam +1 more 2019-09-03
10121896 FinFet with heterojunction and improved channel control Victor Moroz, Qiang Lu 2018-11-06 $19,083,000
10102318 Atomic scale grid for modeling semiconductor structures and fabrication processes Victor Moroz 2018-10-16 $12,737,000
10049173 Parameter extraction of DFT Jie Liu, Victor Moroz, Michael C. Shaughnessy-Culver, Yong-Seog Oh, Pratheep Balasingam +1 more 2018-08-14 $23,255,000
9881111 Simulation scaling with DFT and non-DFT Jie Liu, Victor Moroz, Michael C. Shaughnessy-Culver, Yong-Seog Oh, Pratheep Balasingam +1 more 2018-01-30 $11,989,000
9852242 Atomic scale grid for modeling semiconductor structures and fabrication processes Victor Moroz 2017-12-26 $8,490,000
9836563 Iterative simulation with DFT and non-DFT Jie Liu, Victor Moroz, Michael C. Shaughnessy-Culver, Yong-Seog Oh, Pratheep Balasingam +1 more 2017-12-05 $16,328,000
9727675 Parameter extraction of DFT Jie Liu, Victor Moroz, Michael C. Shaughnessy-Culver, Yong-Seog Oh, Pratheep Balasingam +1 more 2017-08-08 $9,831,000
9530027 Device lock for transit Shahrokh Shahidzadeh, Venkatesh Ramamurthy, Reinhard R. Steffens, Gyan Prakash, Christian von Reventlow +1 more 2016-12-27 $11,980,000
6259720 Versatile digital signal processing system John Michael Buss, James Douglas Dworkin 2001-07-10 $36,156,000
5852730 Hybrid instruction set for versatile digital signal processing system John Michael Buss, James Douglas Dworkin 1998-12-22
5752012 Computational array with self timed computational element and method of self timed calculation 1998-05-12 $5,446,000
5726924 Exponentiation circuit utilizing shift means and method of using same John Michael Buss, James Douglas Dworkin, Scott Edward Lloyd, Shaowei Pan, Shay-Ping T. Wang 1998-03-10 $9,899,000
5608663 Computational array circuit for providing parallel multiplication 1997-03-04 $16,283,000