Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10157253 | Multi-bit-mapping aware clock gating | Peter Wilhelm Josef Zepter, Wladimir Alejandro Plagges Martinez | 2018-12-18 |
| 6397341 | Method for improving the speed of behavioral synthesis links to logic synthesis | — | 2002-05-28 |