Issued Patents All Time
Showing 1–2 of 2 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6704697 | Unified timing analysis for model interface layout parasitics | Oleg Levitsky | 2004-03-09 |
| 6378113 | Black box transparency in a circuit timing model | Oleg Levitsky | 2002-04-23 |