MK

Mohammad Ziaullah Khan

SY Synopsys: 4 patents #328 of 2,302Top 15%
Overall (All Time): #1,127,835 of 4,157,543Top 30%
4
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11847396 Integrated circuit design using multi-bit combinational cells Mayank Jain, Deepak D. Sherlekar, Guilherme Augusto Flach, Linuo Xue, Jeff Ku +1 more 2023-12-19
11657205 Construction, modeling, and mapping of multi-output cells Deepak D. Sherlekar 2023-05-23
11328109 Refining multi-bit flip flops mapping without explicit de-banking and re-banking Deepak D. Sherlekar, Channakeshav Ananth, Muniraj Ramamurthy 2022-05-10
8751986 Method and apparatus for automatic relative placement rule generation Anand Arunachalam, Mustafa Kamal, Xinwei Zheng, Xiaoyan Yang, Dongxiang Wu 2014-06-10