Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11526642 | Clock network power estimation for logical designs | Min Pan, Feng Sheng | 2022-12-13 |
| 10073944 | Clock tree synthesis based on computing critical clock latency probabilities | Aiqun Cao | 2018-09-11 |
| 9058451 | Automatic synthesis of complex clock systems | Tao Lin, Jieyi Long, Michael Bezman | 2015-06-16 |