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Network flow based framework for clock tree optimization |
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Clock tree synthesis based on computing critical clock latency probabilities |
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Timing bottleneck analysis across pipelines to guide optimization with useful skew |
— |
2016-03-22 |
| 9183335 |
Dynamic power driven clock tree synthesis (CTS) |
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Multi-mode scheduler for clock tree synthesis |
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Dual-structure clock tree synthesis (CTS) |
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| 9009645 |
Automatic clock tree routing rule generation |
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Automatic clock tree synthesis exceptions generation |
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