AW

Albert Wang

ST Stretch: 8 patents #1 of 15Top 7%
MS Matrix Integrated Systems: 6 patents #2 of 14Top 15%
SY Synopsys: 2 patents #669 of 2,302Top 30%
SY Synopsis: 1 patents #1 of 39Top 3%
Overall (All Time): #278,538 of 4,157,543Top 7%
17
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8001266 Configuring a multi-processor system Ricardo E. Gonzalez, Richard L. Rudell, Abhijit Ghosh 2011-08-16
7613900 Systems and methods for selecting input/output configuration in an integrated circuit Ricardo E. Gonzalez 2009-11-03
7610475 Programmable logic configuration for instruction extensions Jeffrey M. Arnold, Gareld Howard Banta, Scott Johnson 2009-10-27
7581081 Systems and methods for software extensible multi-processing Ricardo E. Gonzalez, Gareld Howard Banta 2009-08-25
7421561 Instruction set for efficient bit stream and byte stream I/O Kenneth Williams, Scott Johnson, Bruce Saylors McNamara 2008-09-02
7373642 Defining instruction extensions in a standard programming language Kenneth Williams 2008-05-13
7284114 Video processing system with reconfigurable instructions Jeffrey M. Arnold, Gareld Howard Banta, Scott Johnson 2007-10-16
6954845 Reconfigurable instruction set computing Jeffrey M. Arnold, Gareld Howard Banta, Scott Johnson 2005-10-11
6736927 Apparatus for increased workpiece throughput Scott J. Baron, Prasad Padmanabhan, Gerald M. Cox 2004-05-18
6660975 Method for producing flat wafer chucks Robert Chen 2003-12-09
6605226 Method for increased workpiece throughput Scott J. Baron, Prasad Padmanabhan, Gerald M. Cox 2003-08-12
6499777 End-effector with integrated cooling mechanism 2002-12-31
6461801 Rapid heating and cooling of workpiece chucks 2002-10-08
6409932 Method and apparatus for increased workpiece throughput Scott J. Baron, Prasad Padmanabhan, Gerald M. Cox 2002-06-25
6167561 Method and apparatus for entry of timing constraints Benjamin Chen, Peter Macliesh 2000-12-26
5579510 Method and structure for use in static timing verification of synchronous circuits Richard L. Rudell 1996-11-26
5500808 Apparatus and method for estimating time delays using unmapped combinational logic networks 1996-03-19