PJ

Patrick Jerier

SS Stmicroelectronics Sa: 3 patents #1,424 of 4,662Top 35%
Overall (All Time): #1,605,737 of 4,157,543Top 40%
3
Patents All Time

Issued Patents All Time

Showing 1–3 of 3 patents

Patent #TitleCo-InventorsDate
6776842 Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic Didier Dutartre 2004-08-17
6294443 Method of epitaxy on a silicon substrate comprising areas heavily doped with boron Didier Dutartre 2001-09-25
6162706 Method of epitaxy on a silicon substrate comprising areas heavily doped with arsenic Didier Dutartre 2000-12-19