Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10109590 | Indexing of electronic devices distributed on different chips | Alessandro Freguglia | 2018-10-23 |
| 9099480 | Indexing of electronic devices distributed on different chips | Alessandro Freguglia | 2015-08-04 |
| 7220686 | Process for contact opening definition for active element electrical connections | — | 2007-05-22 |
| 7192820 | Method for reducing non-uniformity or topography variation between an array and circuitry in a process for manufacturing semiconductor integrated non-volatile memory devices | — | 2007-03-20 |
| 6812098 | Method for manufacturing non-volatile memory device | Carmen Calareso | 2004-11-02 |
| 6630739 | Planarization structure and method for dielectric layers | Patrizia Sonego, Elio Colabella, Maurizio Bacchetta | 2003-10-07 |
| 6602774 | Selective salicidation process for electronic devices integrated in a semiconductor substrate | Gabriella Fontana | 2003-08-05 |
| 6586313 | Method of avoiding the effects of lack of uniformity in trench isolated integrated circuits | — | 2003-07-01 |
| 6458659 | Method of fabricating non-volatile memory devices integrated in a semiconductor substrate and organized into memory matrices | Lidia Brusaferri | 2002-10-01 |
| 6380582 | Autoaligned etching process for realizing word lines in memory devices integrated semiconductor substrates | Emilio Camerlenghi, Elio Colabella, Adriana Rebora | 2002-04-30 |
| 6284585 | Electronic memory device having bit lines with block selector switches | Emilio Camerlenghi, Paolo Cappelletti | 2001-09-04 |
| 6239037 | Autoaligned etching process for realizing word lines and improving the reliability of semiconductor integrated memory devices | Elio Colabella, Adriana Rebora | 2001-05-29 |
| 6156637 | Method of planarizing a semiconductor device by depositing a dielectric ply structure | Patrizia Sonego, Elio Colabella, Maurizio Bacchetta | 2000-12-05 |
| 6130165 | Autoaligned etching process for realizing word lines in memory devices integrated semiconductor substrates | Emilio Camerlenghi, Elio Colabella, Adriana Rebora | 2000-10-10 |
| 6101124 | Memory block for realizing semiconductor memory devices and corresponding manufacturing process | Emilio Camerlenghi, Paolo Cappelletti | 2000-08-08 |
| 5994231 | Process for depositing a stratified dielectric structure for enhancing the planarity of semiconductor electronic devices | Patrizia Sonego, Elio Colabella, Maurizio Bacchetta | 1999-11-30 |
| 5969977 | Electronic memory device having bit lines with block selector switches | Emilio Camerlenghi, Paolo Cappelletti | 1999-10-19 |