Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6774731 | Method and circuit for minimizing glitches in phase-locked loops | Antonio Magazzu, Benedetto Marco Marletta, Giuseppe Gramegna | 2004-08-10 |
| 6593817 | Method and circuit for minimizing glitches in phase-locked loops | Antonio Magazz', Benedetto Marco Marletta, Giuseppe Gramegna | 2003-07-15 |
| 6392490 | High-precision biasing circuit for a cascoded CMOS stage, particularly for low noise amplifiers | Giuseppe Gramegna, B. Marco Marletta | 2002-05-21 |