Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
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Stephan Niel

SSStmicroelectronics (Rousset) Sas: 45 patents #8 of 397Top 3%
SSStmicroelectronics (Crolles 2) Sas: 14 patents #23 of 529Top 5%
CEA: 1 patents #3,381 of 7,956Top 45%
Meylan, FR: #5 of 946 inventorsTop 1%
Overall (All Time): #64,511 of 4,157,543Top 2%
45 Patents All Time

Issued Patents All Time

Showing 26–45 of 45 patents

Patent #TitleCo-InventorsDate
9876122 Vertical memory cell with non-self-aligned floating drain-source implant Marc Mantelli, Arnaud Regnier, Francesco La Rosa, Julien Delalleau 2018-01-23
9825186 Read performance of a non-volatile memory device, in particular a non-volatile memory device with buried selection transistor Francesco La Rosa, Arnaud Regnier 2017-11-21
9691866 Memory cell having a vertical selection gate formed in an FDSOI substrate Arnaud Regnier, Jean-Michel Mirabel, Francesco La Rosa 2017-06-27
9666484 Integrated circuit protected from short circuits caused by silicide Arnaud Regnier, Francesco La Rosa 2017-05-30
9653470 Individually read-accessible twin memory cells Francesco La Rosa, Arnaud Regnier 2017-05-16
9627068 Twin memory cell interconnection structure Francesco La Rosa, Arnaud Regnier 2017-04-18
9613709 Dual non-volatile memory cell comprising an erase transistor Francesco La Rosa, Arnaud Regnier 2017-04-04
9543311 Vertical memory cell with non-self-aligned floating drain-source implant Marc Mantelli, Arnaud Regnier, Francesco La Rosa, Julien Delalleau 2017-01-10
9484107 Dual non-volatile memory cell comprising an erase transistor Francesco La Rosa, Arnaud Regnier 2016-11-01
9461129 Memory cell having a vertical selection gate formed in an FDSOI substrate Arnaud Regnier, Jean-Michel Mirabel, Francesco La Rosa 2016-10-04
9443598 Method for programming a non-volatile memory cell comprising a shared select transistor gate Francesco La Rosa, Arnaud Regnier 2016-09-13
9406686 Memory cell comprising non-self-aligned horizontal and vertical control gates Francesco La Rosa, Julien Delalleau, Arnaud Regnier 2016-08-02
9368215 Method for biasing an embedded source plane of a non-volatile memory having vertical select gates Francesco La Rosa, Arnaud Regnier 2016-06-14
9224482 Hot-carrier injection programmable memory and method of programming such a memory Francesco La Rosa, Arnaud Regnier, Julien Delalleau 2015-12-29
9076878 Non-volatile memory with vertical selection transistors Francesco La Rosa, Arnaud Regnier, Yoann Goasduff 2015-07-07
9012961 Method of manufacturing a non-volatile memory Francesco La Rosa, Arnaud Regnier, Hélène Dalle-Houilliez 2015-04-21
8901634 Nonvolatile memory cells with a vertical selection gate of variable depth Francesco La Rosa, Yoann Goasduff, Arnaud Regnier 2014-12-02
8830761 Method of reading and writing nonvolatile memory cells Francesco La Rosa, Olivier Pizzuto, Philippe Boivin, Pascal Fornara, Laurent Lopez +1 more 2014-09-09
8426973 Integrated circuit of decreased size Jean-Michel Mirabel 2013-04-23
7767532 Method for manufacturing an EEPROM cell 2010-08-03