Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10535416 | Automatic test-pattern generation for memory-shadow-logic testing | — | 2020-01-14 |
| 9812219 | Automatic test-pattern generation for memory-shadow-logic testing | — | 2017-11-07 |
| 9324414 | Selective dual cycle write operation for a self-timed memory | Shishir Kumar | 2016-04-26 |
| 9147453 | Programmable delay introducing circuit in self timed memory | Mudit Bhargava, Shishir Kumar | 2015-09-29 |
| 9003255 | Automatic test-pattern generation for memory-shadow-logic testing | — | 2015-04-07 |
| 8963053 | Programmable delay introducing circuit in self-timed memory | Mudit Bhargava, Shishir Kumar | 2015-02-24 |
| 8929115 | XY ternary content addressable memory (TCAM) cell and array | — | 2015-01-06 |
| 8913457 | Dual clock edge triggered memory | Robin Wilson | 2014-12-16 |
| 8854902 | Write self timing circuitry for self-timed memory | — | 2014-10-07 |
| 8854901 | Read self timing circuitry for self-timed memory | — | 2014-10-07 |
| 8730756 | Dual clock edge triggered memory | Robin Wilson | 2014-05-20 |
| 8681534 | Dual port register file memory cell with reduced susceptibility to noise during same row access | Hiten Advani | 2014-03-25 |
| 8138455 | Programmable delay introducing circuit in self timed memory | Mudit Bhargava, Shishir Kumar | 2012-03-20 |