Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9570396 | Method of forming a damascene interconnect on a barrier layer | — | 2017-02-14 |
| 9396959 | Semiconductor device with stop layers and fabrication method using ceria slurry | Masayuki Moriya | 2016-07-19 |
| 8344510 | Semiconductor device with void detection monitor | — | 2013-01-01 |
| 8222147 | Semiconductor device with stop layers and fabrication method using ceria slurry | Masayuki Moriya | 2012-07-17 |
| 8008778 | Semiconductor device | — | 2011-08-30 |
| 7902056 | Plasma treated metal silicide layer formation | Tatsuya Inoue, Naoki Takeguchi | 2011-03-08 |
| 7901954 | Method for detecting a void | — | 2011-03-08 |
| 7679194 | Method of fabricating semiconductor memory device and semiconductor memory device driver | Tatsuya Hashimoto, Toshiyuki Maenosono, Taji Togawa, Hideo Takagi | 2010-03-16 |
| 7453116 | Semiconductor memory device and method of fabricating the same | Hideo Takagi, Miyuki Umetsu, Tsukasa Takamatsu | 2008-11-18 |
| 7037780 | Semiconductor memory device and method of fabricating the same | Hideo Takagi, Miyuki Umetsu, Tsukasa Takamatsu | 2006-05-02 |
| 6794248 | Method of fabricating semiconductor memory device and semiconductor memory device driver | Tatsuya Hashimoto, Toshiyuki Maenosono, Taiji Togawa, Hideo Takagi | 2004-09-21 |
| 6007732 | Reduction of reflection by amorphous carbon | Koichi Hashimoto, Toshiyuki Ohtsuka, Fumihiko Shinpuku, Daisuke Matsunaga | 1999-12-28 |
| 5656128 | Reduction of reflection by amorphous carbon | Koichi Hashimoto, Toshiyuki Ohtsuka, Fumihiko Shinpuku, Daisuke Matsunaga | 1997-08-12 |