TG

Tetsuo Gocho

SO Sony: 20 patents #2,042 of 25,231Top 9%
Overall (All Time): #215,858 of 4,157,543Top 6%
20
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
12389647 Semiconductor device including a field effect transistor with nanostructure based laminated channel structure and a field effect transistor with a single channel structure Yuzo Fukuzaki, Shinichi Miyake, Kazuyuki Tomida 2025-08-12
12342093 Solid-state image sensor Masami Nagata 2025-06-24
11985443 Solid-state image sensor Masami Nagata 2024-05-14
11961885 Semiconductor device Yuzo Fukuzaki, Shinichi Miyake, Kazuyuki Tomida 2024-04-16
11476329 Semiconductor device Yuzo Fukuzaki, Shinichi Miyake, Kazuyuki Tomida 2022-10-18
10991723 Semiconductor device, method of manufacturing semiconductor device, and electronic apparatus — 2021-04-27
RE38363 Method of forming trench isolation having polishing step and method of manufacturing semiconductor device Hideaki Hayakawa 2003-12-23
6258654 Method of manufacturing a semiconductor device — 2001-07-10
6218266 Method of fabricating electronic devices of the type including smoothing process using polishing Junichi Sato 2001-04-17
5700349 Method for forming multi-layer interconnections Masanori Tsukamoto 1997-12-23
5698352 Semiconductor device containing Si, O and N anti-reflective layer Tohru Ogawa 1997-12-16
5648202 Method of forming a photoresist pattern using an anti-reflective Tohru Ogawa 1997-07-15
5641607 Anti-reflective layer used to form a semiconductor device Tohru Ogawa 1997-06-24
5632910 Multilayer resist pattern forming method Tetsuji Nagayama 1997-05-27
5600165 Semiconductor device with antireflection film Masanori Tsukamoto 1997-02-04
5502008 Method for forming metal plug and/or wiring metal layer Hideaki Hayakawa, Junichi Sato 1996-03-26
5498565 Method of forming trench isolation having polishing step and method of manufacturing semiconductor device Hideaki Hayakawa 1996-03-12
5472827 Method of forming a resist pattern using an anti-reflective layer Tohru Ogawa 1995-12-05
5254171 Bias ECR plasma CVD apparatus comprising susceptor, clamp, and chamber wall heating and cooling means Hideaki Hayakawa, Junichi Sato 1993-10-19
5242853 Manufacturing process for a semiconductor device using bias ECRCVD and an etch stop layer Junichi Sato, Yasushi Morita 1993-09-07