YV

Yves-Matthieu Le Vaillant

ST S.O.I. Tec Silicon On Insulator Technologies: 7 patents #22 of 155Top 15%
SO Soitec: 1 patents #140 of 259Top 55%
📍 Crolles, FR: #21 of 148 inventorsTop 15%
Overall (All Time): #644,568 of 4,157,543Top 20%
8
Patents All Time

Issued Patents All Time

Showing 1–8 of 8 patents

Patent #TitleCo-InventorsDate
9240343 Method for modifying an initial stress state of an active layer to a final stress state Etienne Navarro 2016-01-19
7981768 Method for transferring an epitaxial layer 2011-07-19
7887936 Substrate with determinate thermal expansion coefficient 2011-02-15
7740735 Tools and methods for disuniting semiconductor wafers Sebastien Kerdiles 2010-06-22
7473620 Process for adjusting the strain on the surface or inside a substrate made of a semiconductor material 2009-01-06
7465646 Methods for fabricating a wafer structure having a strained silicon utility layer 2008-12-16
7439160 Methods for producing a semiconductor entity Olivier Rayssac, Christophe Fernandez 2008-10-21
7176554 Methods for producing a semiconductor entity Olivier Rayssac, Christophe Fernandez 2007-02-13