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Mohammad Abdallah — 62 Patents

SMSoft Machines: 17 patents #1 of 5Top 20%

INIngersoll-Rand: 2 patents #325 of 857Top 40%

IIIndian Head Industries: 1 patents #28 of 40Top 70%

San Jose, CA: #669 of 32,062 inventorsTop 3%

California: #5,560 of 386,348 inventorsTop 2%

Overall (All Time): #36,550 of 4,157,543Top 1%

62 Patents All Time

Mohammad Abdallah has been granted 62 US patents while listed as an inventor at Soft Machines. The first was granted in 1995 and the most recent in March 2022. Mohammad Abdallah ranks #36,550 of 4,157,543 US inventors in our database (top 0.88%). Patent records list Mohammad Abdallah in San Jose, CA, US.

Patents per Year

Issued Patents All Time

Showing 1–25 of 62 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
11281481	Using a plurality of conversion tables to implement an instruction set agnostic runtime architecture	—	2022-03-22	$16,833,000
10884739	Systems and methods for load canceling in a processor that is connected to an external interconnect fabric	Karthikeyan Avudaiyappan	2021-01-05	$27,050,000
10810014	Method and apparatus for guest return address stack emulation supporting speculation	—	2020-10-20	$43,271,000
10713047	Fast unaligned memory access	Mandeep Singh	2020-07-14	$28,563,000
10564975	Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines	—	2020-02-18	$23,634,000
10521239	Microprocessor accelerated code optimizer	—	2019-12-31	$25,528,000
10514926	Method and apparatus to allow early dependency resolution and data forwarding in a microprocessor	—	2019-12-24	$26,956,000
10503514	Method for implementing a reduced size register view data structure in a microprocessor	—	2019-12-10	$22,400,000
10310987	Systems and methods for accessing a unified translation lookaside buffer	Karthikeyan Avudaiyappan	2019-06-04	$21,702,000
10303484	Method for implementing a line speed interconnect structure	—	2019-05-28	$17,387,000
10289605	Apparatus and method for processing an instruction matrix specifying parallel and dependent operations	—	2019-05-14	$24,469,000
10282170	Method for a stage optimized high speed adder	—	2019-05-07	$24,403,000
10255076	Method for performing dual dispatch of blocks and half blocks	—	2019-04-09	$21,845,000
10228949	Single cycle multi-branch prediction including shadow cache for early far branch prediction	—	2019-03-12	$21,255,000
10191746	Accelerated code optimizer for a multiengine microprocessor	—	2019-01-29	$23,219,000
10146576	Method for executing multithreaded instructions grouped into blocks	—	2018-12-04	$23,085,000
10042643	Guest instruction to native instruction range based mapping using a conversion look aside buffer of a processor	—	2018-08-07	$25,284,000
10013254	Systems and methods for load cancelling in a processor that is connected to an external interconnect fabric	Karthikeyan Avudaiyappan	2018-07-03	$24,450,000
9990200	Executing instruction sequence code blocks by using virtual cores instantiated by partitionable engines	—	2018-06-05	$24,427,000
9965281	Cache storing data fetched by address calculating load instruction with label used as associated name for consuming instruction to refer	—	2018-05-08	$30,284,000
9934072	Register file segments for supporting code block execution by using virtual cores instantiated by partitionable engines	—	2018-04-03	$16,515,000
9934042	Method for dependency broadcasting through a block organized source view data structure	—	2018-04-03	$16,515,000
9921850	Instruction sequence buffer to enhance branch prediction efficiency	—	2018-03-20	$13,809,000
9921845	Memory fragments for supporting code block execution by using virtual cores instantiated by partitionable engines	—	2018-03-20	$13,809,000
9891915	Method and apparatus to increase the speed of the load access and data return speed path using early lower address bits	Ravishankar Rao	2018-02-13	$15,494,000