Issued Patents All Time
Showing 26–50 of 104 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10884947 | Methods and memory systems for address mapping | Aman Bhatia, Fan Zhang, Naveen Kumar | 2021-01-05 |
| 10877840 | Dynamic neighbor and bitline assisted correction for NAND flash storage | Naveen Kumar, Aman Bhatia, Fan Zhang | 2020-12-29 |
| 10854239 | Adaptive-rate error correction layer for tape storage | Wlodzimierz S. Czarnecki, John Mah | 2020-12-01 |
| 10847231 | Memory system with adaptive read-threshold scheme and method of operating such memory system | Aman Bhatia, Chenrong Xiong, Fan Zhang, Naveen Kumar | 2020-11-24 |
| 10783972 | NAND flash memory with reconfigurable neighbor assisted LLR correction with downsampling and pipelining | Jun Feng, Norton Chu, Fan Zhang | 2020-09-22 |
| 10714195 | Read disturb detection and recovery with adaptive thresholding for 3-D NAND storage | Naveen Kumar, Aman Bhatia, Fan Zhang, Chenrong Xiong | 2020-07-14 |
| 10707899 | Bit-flipping decoder for G-LDPC codes with syndrome-decoding for component codes | Aman Bhatia, Naveen Kumar, Chenrong Xiong, Fan Zhang, Xuanxuan Lu | 2020-07-07 |
| 10700706 | Memory system with decoders and method of operating such memory system and decoders | Fan Zhang, Aman Bhatia, Chenrong Xiong, Naveen Kumar | 2020-06-30 |
| 10691536 | Method to select flash memory blocks for refresh after read operations | Aman Bhatia, Fan Zhang, Chenrong Xiong, Naveen Kumar | 2020-06-23 |
| 10691540 | Soft chip-kill recovery for multiple wordlines failure | Naveen Kumar, Aman Bhatia, Chenrong Xiong, Fan Zhang | 2020-06-23 |
| 10693496 | Memory system with LDPC decoder and method of operating such memory system and LDPC decoder | Naveen Kumar, Aman Bhatia, Chenrong Xiong, Fan Zhang | 2020-06-23 |
| 10672497 | Memory system and method for bad block management | Fan Zhang, Naveen Kumar, Aman Bhatia, Chenrong Xiong, Xuanxuan Lu | 2020-06-02 |
| 10601546 | Dynamic interleaver change for bit line failures in NAND flash storage | Naveen Kumar, Aman Bhatia, Chenrong Xiong, Fan Zhang, Xuanxuan Lu | 2020-03-24 |
| 10580514 | Periodically updating a log likelihood ratio (LLR) table in a flash memory controller | Yunxiang Wu, Zhengang Chen, Erich F. Haratsch | 2020-03-03 |
| 10535410 | Hybrid read disturb count management | Fan Zhang, June Lee | 2020-01-14 |
| 10491243 | Deep learning for low-density parity-check (LDPC) decoding | Naveen Kumar, Aman Bhatia, Chenrong Xiong, Fan Zhang | 2019-11-26 |
| 10484008 | Memory system with on-the-fly error detection and termination and operating method thereof | Fan Zhang, Chenrong Xiong, Abhiram Prabhakar, Aman Bhatia, Naveen Kumar | 2019-11-19 |
| 10447302 | Memory system decoding design and operating method thereof | Chenrong Xiong, Fan Zhang, Aman Bhatia, Naveen Kumar | 2019-10-15 |
| 10437513 | Systems and methods for latency based data recycling in a solid state memory system | Yunxiang Wu, Ning Chen, Erich F. Haratsch, Zhengang Chen | 2019-10-08 |
| 10419024 | Early termination of low-density parity-check (LDPC) decoding | Chenrong Xiong, Fan Zhang, Aman Bhatia, Naveen Kumar, Abhiram Prabahkar | 2019-09-17 |
| 10409672 | Media quality aware ECC decoding method selection to reduce data access latency | David Pignatelli, Fan Zhang | 2019-09-10 |
| 10403372 | Memory system with adaptive read-threshold scheme and method of operating such memory system | Aman Bhatia, Chenrong Xiong, Fan Zhang, Naveen Kumar | 2019-09-03 |
| 10389383 | Low-complexity LDPC encoder | Chenrong Xiong, Fan Zhang, Aman Bhatia, Abhiram Prabhakar, Naveen Kumar | 2019-08-20 |
| 10346268 | Efficient data recovery for write path errors | Fan Zhang, Sangcheol Lee | 2019-07-09 |
| 10326473 | Symbol-based coding for NAND flash devices | Aman Bhatia, June Lee, Chenrong Xiong, Naveen Kumar, Fan Zhang | 2019-06-18 |