Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11488970 | Method of forming split gate memory cells with thinner tunnel oxide | Jeng-Wei Yang, Boolean Fan, Nhan Do | 2022-11-01 |
| 11387694 | Asynchronous starting and synchronous reluctance electric motor rotor, electric motor and compressor | Hui Huang, Yusheng Hu, Jinfei Shi, Bin Chen, Yong Xiao | 2022-07-12 |
| 11315636 | Four gate, split-gate flash memory array with byte erase operation | Hsuan Liang, Jeng-Wei Yang, Hieu Van Tran, Lihsin Chang, Nhan Do | 2022-04-26 |
| 10784731 | Rotor structure, motor and compressor | Jinfei Shi, Zeyin Mi, Yong Xiao | 2020-09-22 |
| 10714634 | Non-volatile split gate memory cells with integrated high K metal control gates and method of making same | Jeng-Wei Yang, Chun-Ming Chen, Chien-Sheng Su, Nhan Do | 2020-07-14 |
| 10608090 | Method of manufacturing a split-gate flash memory cell with erase gate | Jeng-Wei Yang, Chun-Ming Chen, Chen-Chih Fan, Nhan Do | 2020-03-31 |
| 10607703 | Split-gate flash memory array with byte erase operation | Hsuan Liang, Jeng-Wei Yang, Nhan Do, Hieu Van Tran | 2020-03-31 |
| 10312246 | Split-gate flash memory cell with improved scaling using enhanced lateral control gate to floating gate coupling | Jeng-Wei Yang, Chun-Ming Chen, Chien-Sheng Su, Nhan Do | 2019-06-04 |
| 10141321 | Method of forming flash memory with separate wordline and erase gates | Chun-Ming Chen, Jeng-Wei Yang, Chien-Sheng Su, Nhan Do | 2018-11-27 |
| 9985042 | Method of integrating FinFET CMOS devices with embedded nonvolatile memory cells | Chien-Sheng Su, Jeng-Wei Yang, Chun-Ming Chen, Hieu Van Tran, Nhan Do | 2018-05-29 |
| 9972493 | Method of forming low height split gate memory cells | Chien-Sheng Su, Jeng-Wei Yang, Chun-Ming Chen, Hieu Van Tran, Nhan Do | 2018-05-15 |
| 9887206 | Method of making split gate non-volatile memory cell with 3D FinFET structure | Chien-Sheng Su, Jeng-Wei Yang, Chun-Ming Chen, Hieu Van Tran, Nhan Do | 2018-02-06 |
| 9793280 | Integration of split gate flash memory array and logic devices | Chun-Ming Chen, Jeng-Wei Yang, Chien-Sheng Su, Nhan Do | 2017-10-17 |
| 9793279 | Split gate non-volatile memory cell having a floating gate, word line, erase gate, and method of manufacturing | Jeng-Wei Yang, Chun-Ming Chen, Mandana Tadayoni, Chien-Sheng Su, Nhan Do | 2017-10-17 |
| 9721958 | Method of forming self-aligned split-gate memory cell array with metal gates and logic devices | Jeng-Wei Yang, Chun-Ming Chen, Feng Zhou, Xian Liu, Chien-Sheng Su +1 more | 2017-08-01 |
| 9634018 | Split gate non-volatile memory cell with 3D finFET structure, and method of making same | Chien-Sheng Su, Jeng-Wei Yang, Chun-Ming Chen, Hieu Van Tran, Nhan Do | 2017-04-25 |
| 9496369 | Method of forming split-gate memory cell array along with low and high voltage logic devices | Jeng-Wei Yang, Chien-Sheng Su, Chun-Ming Chen, Nhan Do | 2016-11-15 |
| 9379121 | Split gate non-volatile flash memory cell having metal gates and method of making same | Chun-Ming Chen, Jeng-Wei Yang, Chien-Sheng Su | 2016-06-28 |
| 9276006 | Split gate non-volatile flash memory cell having metal-enhanced gates and method of making same | Chun-Ming Chen, Jeng-Wei Yang, Chien-Sheng Su | 2016-03-01 |
| 6142355 | Structure of a stapler | — | 2000-11-07 |