Issued Patents All Time
Showing 26–41 of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7580481 | I/Q timing mismatch compensation | — | 2009-08-25 |
| 7447491 | Multi-tuner integrated circuit architecture utilizing frequency isolated local oscillators and associated method | — | 2008-11-04 |
| 7340230 | Receiver architectures utilizing coarse analog tuning and associated methods | Andrew W. Krone | 2008-03-04 |
| 7167694 | Integrated multi-tuner satellite receiver architecture and associated method | Andrew W. Krone | 2007-01-23 |
| 6909390 | Digital-to-analog converter switching circuitry | Douglas R. Frey | 2005-06-21 |
| 6865235 | Multi-protocol modulator | — | 2005-03-08 |
| 6819274 | Method for tuning a bandpass analog-to-digital converter and associated architecture | Andrew W. Krone | 2004-11-16 |
| 6639534 | Digital-to-analog converter switching circuitry | Douglas R. Frey | 2003-10-28 |
| 6603804 | Upsampling filter having one-bit multipliers for multiple spread-data streams | Lysander Lim, Malcolm H. Smith | 2003-08-05 |
| 6313769 | Baseband digital offset correction | Mandell J. Mangahas | 2001-11-06 |
| 6181212 | Phase locked loop for generating two disparate, variable frequency signals | Hussein K. Mecklai | 2001-01-30 |
| 6151613 | Digital filter and method for a MASH delta-sigma modulator | — | 2000-11-21 |
| 6121827 | Digital noise reduction in integrated circuits and circuit assemblies | Lysander Lim | 2000-09-19 |
| 5986281 | Circuit and method for predicting failure rates in a semiconductor device | William Edward Burchanowski, Jeffrey A. Reed | 1999-11-16 |
| 5977897 | Resistor string with equal resistance resistors and converter incorporating the same | Paul Barnes | 1999-11-02 |
| 5841382 | Fast testing of D/A converters | Robert W. Walden, William Edward Burchanowski | 1998-11-24 |