SC

Steve Ciavagia

SG Silicon Graphics: 1 patents #362 of 758Top 50%
📍 Williston, VT: #143 of 203 inventorsTop 75%
🗺 Vermont: #3,027 of 4,968 inventorsTop 65%
Overall (All Time): #3,756,627 of 4,157,543Top 95%
1
Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #TitleCo-InventorsDate
5572704 System and method for controlling split-level caches in a multi-processor system including data loss and deadlock prevention schemes Joseph P. Bratt, John Brennan, Peter Hsu, William A. Huffman, Joseph T. Scanlon 1996-11-05