ML

Marjorie S. Levine

SG Silicon Graphics: 1 patents #362 of 758Top 50%
Overall (All Time): #2,260,762 of 4,157,543Top 55%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
5757658 Procedure and system for placement optimization of cells within circuit blocks by optimizing placement of input/output ports within an integrated circuit design Paul Rodman 1998-05-26
D314304 Dust ruffle for a bed 1991-02-05