Issued Patents All Time
Showing 251–275 of 400 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6583000 | Process integration of Si1-xGex CMOS with Si1-xGex relaxation after STI formation | Jong-Jan Lee, Jer-Shen Maa, Douglas J. Tweet | 2003-06-24 |
| 6579793 | Method of achieving high adhesion of CVD copper thin films on TaN Substrates | Wei-Wei Zhuang, Wei Pan, David R. Evans | 2003-06-17 |
| 6576293 | Method to improve copper thin film adhesion to metal nitride substrates by the addition of water | Wei-Wei Zhuang, David R. Evans | 2003-06-10 |
| 6576292 | Method of forming highly adhesive copper thin films on metal nitride substrates via CVD | Wei-Wei Zhuang, David R. Evans | 2003-06-10 |
| 6573134 | Dual metal gate CMOS devices and method for making the same | Yanjun Ma, Yoshi Ono, David R. Evans | 2003-06-03 |
| 6569745 | Shared bit line cross point memory array | — | 2003-05-27 |
| 6566148 | Method of making a ferroelectric memory transistor | Tingkai Li, Bruce D. Ulrich | 2003-05-20 |
| 6566753 | Composite iridium barrier structure with oxidized refractory metal companion barrier | Fengyan Zhang | 2003-05-20 |
| 6562703 | Molecular hydrogen implantation method for forming a relaxed silicon germanium layer with high germanium content | Jer-Shen Maa, Douglas J. Tweet, Jong-Jan Lee | 2003-05-13 |
| 6555456 | Method of forming iridium conductive electrode/barrier structure | Fengyan Zhang, Jer-Shen Maa | 2003-04-29 |
| 6555874 | Method of fabricating high performance SiGe heterojunction bipolar transistor BiCMOS on a silicon-on-insulator substrate | Douglas J. Tweet, Bruce D. Ulrich, Hong Ying | 2003-04-29 |
| 6555916 | Integrated circuit prepared by selectively cleaning copper substrates, in-situ, to remove copper oxides | Tue Nguyen, Lawrence J. Charneski, David R. Evans | 2003-04-29 |
| 6555467 | Method of making air gaps copper interconnect | Wei Pan | 2003-04-29 |
| 6548364 | Self-aligned SiGe HBT BiCMOS on SOI substrate and method of fabricating the same | — | 2003-04-15 |
| 6548849 | Magnetic yoke structures in MRAM devices to reduce programming power consumption and a method to make the same | Wei Pan | 2003-04-15 |
| 6541385 | Method for plasma etching of Ir-Ta-O electrode and for post-etch cleaning | Hong Ying, Fengyan Zhang, Jer-Shen Maa | 2003-04-01 |
| 6537361 | Method of the synthesis and control of PGO spin-coating precursor solutions | Wei-Wei Zhuang, Fengyan Zhang, Jer-Shen Maa | 2003-03-25 |
| 6534871 | Device including an epitaxial nickel silicide on (100) Si or stable nickel silicide on amorphous Si and a method of fabricating the same | Jer-Shen Maa, Douglas J. Tweet, Yoshi Ono, Fengyan Zhang | 2003-03-18 |
| 6534787 | Asymmetrical MOS channel structure with drain extension | — | 2003-03-18 |
| 6534326 | Method of minimizing leakage current and improving breakdown voltage of polycrystalline memory thin films | Tingkai Li, Fengyan Zhang, Wei-Wei Zhuang | 2003-03-18 |
| 6531371 | Electrically programmable resistance cross point memory | Wei-Wei Zhuang | 2003-03-11 |
| 6531325 | Memory transistor and method of fabricating same | Fengyan Zhang, Tingkai Li | 2003-03-11 |
| 6531324 | MFOS memory transistor & method of fabricating same | Fengyan Zhang, Tingkai Li | 2003-03-11 |
| 6524893 | Electrostatic discharge protection device for semiconductor integrated circuit, method for producing the same, and electrostatic discharge protection circuit using the same | Hidechika Kawazoe, Eiji Aoki, Katsumasa Fujii | 2003-02-25 |
| 6509260 | Method of shallow trench isolation using a single mask | David R. Evans | 2003-01-21 |