Issued Patents All Time
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11113069 | Implementing quick-release VLV memory access array | Lei Wang | 2021-09-07 |
| 10860327 | Methods for scheduling that determine whether to remove a dependent micro-instruction from a reservation station queue based on determining a cache hit/miss status of a load micro-instruction once a count reaches a predetermined value and an apparatus using the same | — | 2020-12-08 |
| 10853080 | System and method of merging partial write results for resolving renaming size issues | Mengchen Yang | 2020-12-01 |
| 10776116 | Instruction translation circuit, processor circuit and executing method thereof | Chenchen Song, Aimin Ling, Yingbing Guan | 2020-09-15 |
| 10747542 | Load store dependency predictor using separate alias tables for store address instructions and store data instructions | — | 2020-08-18 |
| 10705851 | Scheduling that determines whether to remove a dependent micro-instruction from a reservation station queue based on determining cache hit/miss status of one ore more load micro-instructions once a count reaches a predetermined value | — | 2020-07-07 |
| 10509655 | Processor circuit and operation method thereof | — | 2019-12-17 |
| 10248425 | Processor with slave free list that handles overflow of recycled physical registers and method of recycling physical registers in a processor using a slave free list | — | 2019-04-02 |
| 10203957 | Processor with improved alias queue and store collision detection to reduce memory violations and load replays | — | 2019-02-12 |
| 10042646 | System and method of merging partial write result during retire phase | — | 2018-08-07 |