Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12288068 | Instruction simulation device and method thereof | Weilin Wang, Yingbing Guan | 2025-04-29 |
| 12153919 | Efficient instruction translation method, and processor | Juanli Song | 2024-11-26 |
| 12056493 | Processor and operating method thereof for renaming destination logical register of move instruction | Chenchen Song, Yu Zhang, Jianbin Wang | 2024-08-06 |
| 11995440 | Method and system for executing new instructions | Weilin Wang, Yingbing Guan | 2024-05-28 |
| 11914515 | Cache memory device and data cache method | Junjie Zhang, Jing Qiao, Jianbin Wang | 2024-02-27 |
| 11914997 | Method and system for executing new instructions | Weilin Wang, Yingbing Guan | 2024-02-27 |
| 11816487 | Method of converting extended instructions based on an emulation flag and retirement of corresponding microinstructions, device and system using the same | Weilin Wang, Yingbing Guan | 2023-11-14 |
| 11803381 | Instruction simulation device and method thereof | Weilin Wang, Yingbing Guan | 2023-10-31 |
| 11803383 | Method and system for executing new instructions | Weilin Wang, Yingbing Guan | 2023-10-31 |
| 11803387 | System for executing new instructions and method for executing new instructions | Weilin Wang, Yingbing Guan | 2023-10-31 |
| 11789736 | Method and system for executing new instructions | Weilin Wang, Yingbing Guan | 2023-10-17 |
| 11669328 | Method and system for converting instructions | Weilin Wang, Yingbing Guan | 2023-06-06 |
| 11625247 | System for executing new instructions and method for executing new instructions | Weilin Wang, Yingbing Guan | 2023-04-11 |
| 11604643 | System for executing new instructions and method for executing new instructions | Weilin Wang, Yingbing Guan | 2023-03-14 |
| 11403103 | Microprocessor with multi-step ahead branch predictor and having a fetch-target queue between the branch predictor and instruction cache | Fangong Gong | 2022-08-02 |
| 11379243 | Microprocessor with multistep-ahead branch predictor | Fangong Gong, Guohua Chen | 2022-07-05 |
| 11249764 | Flushing in a microprocessor with multi-step ahead branch predictor and a fetch target queue | Fangong Gong | 2022-02-15 |
| 11016892 | Cache system and operating method thereof | Xianpei Zheng, Zhongmin Chen, Weilin Wang, Jiin Lai | 2021-05-25 |
| 10853080 | System and method of merging partial write results for resolving renaming size issues | Xiaolong Fei | 2020-12-01 |
| 10303479 | Efficient random number generation for update events in multi-bank conditional branch predictor | Guohua Chen, Xiaoling Wang | 2019-05-28 |
| 10209993 | Branch predictor that uses multiple byte offsets in hash of instruction block fetch address and branch pattern to generate conditional branch predictor indexes | Xiaoling Wang, Guohua Chen | 2019-02-19 |
| 9979414 | Methods for accelerating hash-based compression and apparatuses using the same | Xiaoyang Li, Zongpu Qi, Zheng Wang, Fangfang Wu, Shican Luo +4 more | 2018-05-22 |
| 9912351 | Methods for accelerating hash-based compression and apparatuses using the same | Xiaoyang Li, Zongpu Qi, Zheng Wang, Fangfang Wu, Shican Luo +4 more | 2018-03-06 |
| 9823933 | System and method of reissue parking for a microprocessor | Penghao Zou, Jianbin Wang, Xiaoyuan Yu, Xin Gao | 2017-11-21 |