Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10083266 | Simulation method of CMP process | Yun Cao, Huan Kan, Fang Wei, Jun Zhu, Xusheng Zhang | 2018-09-25 |
| 9991116 | Method for forming high aspect ratio patterning structure | Peng Liu, Qiyan Feng, Yu Ren, Jun Zhu, HsuSheng Chang | 2018-06-05 |
| 9871064 | Method for forming shallow trenches of the dual active regions | Quan Jing, Jin Xu, Minjie Chen, Yu Ren, Jun Zhu +1 more | 2018-01-16 |
| 9842743 | Method of etching a shallow trench | Jin Xu, Zaifeng Tang, Minjie Chen, Yu Ren | 2017-12-12 |
| 9666472 | Method for establishing mapping relation in STI etch and controlling critical dimension of STI | Jin Xu, Qiyan Feng, Yu Ren, Xusheng Zhang | 2017-05-30 |
| 8900887 | Method for etching polysilicon gate | Zaifeng Tang, Chao Fang, HsuSheng Chang | 2014-12-02 |
| 8674480 | High voltage bipolar transistor with pseudo buried layers | Tzuyin CHIU, TungYuan Chu, Wensheng Qian, YungChieh Fan, Jun Hu +1 more | 2014-03-18 |
| 8658502 | Method for reducing morphological difference between N-doped and undoped polysilicon gates after etching | Zaifeng Tang, Chao Fang, HsuSheng Chang | 2014-02-25 |