PP

Pierangelo Pansana

SS Sgs-Ates Componenti Elettronici S.P.A.: 1 patents #30 of 73Top 45%
SS Sgs Microelettronica S.P.A.: 1 patents #52 of 104Top 50%
📍 Muggiò, IT: #3 of 10 inventorsTop 30%
Overall (All Time): #2,334,676 of 4,157,543Top 60%
2
Patents All Time

Issued Patents All Time

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
4719184 Process for the fabrication of integrated structures including nonvolatile memory cells with layers of self-aligned silicon and associated transistors Daniele Cantarelli, Giuseppe Crisenza 1988-01-12
4488931 Process for the self-alignment of a double polycrystalline silicon layer in an integrated circuit device through an oxidation process 1984-12-18