Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10971367 | Method for fabricating vertical transistor having a silicided bottom | Duohui Bei | 2021-04-06 |
| 10755937 | Vertical transistor having a silicided bottom and method for fabricating thereof | Duohui Bei | 2020-08-25 |
| 10559684 | Vertical transistor having dual work function materials and method for fabricating thereof | Duohui Bei | 2020-02-11 |
| 10535750 | Semiconductor device manufacturing method with reduced gate electrode height loss and related devices | Jianhua Ju, Shaofeng Yu, Yang Liu, Yongmeng Lee | 2020-01-14 |
| 10332980 | EPI integrality on source/drain region of FinFET | — | 2019-06-25 |
| 9425100 | Methods of facilitating fabricating transistors | Min-hwa Chi, Haiting Wang, Qin Wang, Meixiong Zhao, Duohui Bei | 2016-08-23 |
| 9379186 | Fet structure for minimum size length/width devices for performance boost and mismatch reduction | Qin Wang, Min-hwa Chi, Meixiong Zhao, Haiting Wang, Lucas M. Salazar +1 more | 2016-06-28 |