HT

Hideki Tsuya

SL Semiconductor Energy Laboratory: 3 patents #754 of 1,113Top 70%
AK Araco Kabushiki Kaisha: 1 patents #30 of 107Top 30%
HP Hyogo Prefecture: 1 patents #3 of 25Top 15%
JS Japan Society For The Promotion Of Science: 1 patents #5 of 13Top 40%
Overall (All Time): #1,012,186 of 4,157,543Top 25%
5
Patents All Time

Issued Patents All Time

Showing 1–5 of 5 patents

Patent #TitleCo-InventorsDate
8486772 Method of manufacturing SOI substrate Kazuya Hanaoka, Masaharu Nagai 2013-07-16
8367517 Method for manufacturing SOI substrate Kazuya Hanaoka, Yoshihiro Komatsu 2013-02-05
8168481 Method of manufacturing SOI substrate Kazuya Hanaoka, Masaharu Nagai 2012-05-01
7360964 Joint structure Naoki Hirose 2008-04-22
7126194 Method for removing impurities of a semiconductor wafer, semiconductor wafer assembly, and semiconductor device Seigo Kishino 2006-10-24