Issued Patents All Time
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12125923 | High voltage diode on SOI substrate with trench-modified current path | Jaroslav Pjencak, Johan Camiel Julia Janssens | 2024-10-22 |
| 11289570 | Semiconductor device having optimized drain termination and method therefor | Johan Camiel Julia Janssens, Jaroslav Pjencak | 2022-03-29 |
| 11251263 | Electronic device including a semiconductor body or an isolation structure within a trench | Jaroslav Pjencak, Johan Camiel Julia Janssens | 2022-02-15 |
| 10971632 | High voltage diode on SOI substrate with trench-modified current path | Jaroslav Pjencak, Johan Camiel Julia Janssens | 2021-04-06 |
| 10896954 | Electronic device including a drift region | Ladislav {hacek over (S)}eliga, Thierry Coffi Herve Yao, Jaroslav Pjen{hacek over (c)}ák, Gary H. Loechelt | 2021-01-19 |
| 10818516 | Semiconductor device having biasing structure for self-isolating buried layer and method therefor | Johan Camiel Julia Janssens, Bruce Greenwood, Sallie Hose, Agajan Suwhanov | 2020-10-27 |
| 10497780 | Circuit and an electronic device including a transistor and a component and a process of forming the same | Agajan Suwhanov, Johan Camiel Julia Janssens | 2019-12-03 |
| 10490549 | Isolation structure for semiconductor device having self-biasing buried layer and method therefor | Johan Camiel Julia Janssens, Jaroslav Pjencak, Thierry Coffi Herve Yao, Mark Griswold, Weize Chen | 2019-11-26 |
| 10276556 | Semiconductor device having biasing structure for self-isolating buried layer and method therefor | Johan Camiel Julia Janssens, Bruce Greenwood, Sallie Hose, Agajan Suwhanov | 2019-04-30 |
| 10224323 | Isolation structure for semiconductor device having self-biasing buried layer and method therefor | Johan Camiel Julia Janssens, Jaroslav Pjencak, Thierry Coffi Herve Yao, Mark Griswold, Weize Chen | 2019-03-05 |
| 10153213 | Process of forming an electronic device including a drift region, a sinker region and a resurf region | Ladislav {hacek over (S)}eliga, Thierry Coffi Herve Yao, Jaroslav Pjen{hacek over (c)}ák, Gary H. Loechelt | 2018-12-11 |
| 10026728 | Semiconductor device having biasing structure for self-isolating buried layer and method therefor | Johan Camiel Julia Janssens, Bruce Greenwood, Sallie Hose, Agajan Suwhanov | 2018-07-17 |
| 9923092 | Method of forming a semiconductor device | Thierry Coffi Herve Yao | 2018-03-20 |
| 9478607 | Electronic device including an isolation structure | Thierry Coffi Herve Yao, Matthew Comard | 2016-10-25 |
| 9245952 | Method of forming a semiconductor device and structure therefor | Thierry Coffi Herve Yao | 2016-01-26 |
| 9048237 | Electronic device including a nonvolatile memory structure having an antifuse component | Thierry Coffi Herve Yao, Skip Shizhen Liu | 2015-06-02 |
| 8803282 | Electronic device including a nonvolatile memory structure having an antifuse component | Thierry Coffi Herve Yao | 2014-08-12 |
| 8741697 | Electronic device including a nonvolatile memory structure having an antifuse component and a process of forming the same | Thierry Coffi Herve Yao, Shizen Skip Liu | 2014-06-03 |
| 8724364 | Electronic device including a nonvolatile memory structure having an antifuse component and a process of using the same | Thierry Coffi Herve Yao, Shizen Skip Liu | 2014-05-13 |
| 8530283 | Process for forming an electronic device including a nonvolatile memory structure having an antifuse component | Thierry Coffi Herve Yao | 2013-09-10 |
| 7466190 | Charge pump with four-well transistors | Ravindar M. Lall, Kazi Rubaiat Habib | 2008-12-16 |
| 7405446 | Electrostatic protection systems and methods | Rick Smoak, Mayank Gupta | 2008-07-29 |