Issued Patents All Time
Showing 1–25 of 26 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12213258 | Method of manufacture for embedded IC chip directly connected to PCB | Haris Basit, Michael Riley Vinson | 2025-01-28 |
| 12150254 | Method of forming a laminate structure having a plated through-hole using a removable cover layer | Dale Kersten | 2024-11-19 |
| 12063748 | Catalyzed metal foil and uses thereof to produce electrical circuits | Sunity Sharma, Gary Lawrence Borges, Michael Riley Vinson | 2024-08-13 |
| 11877404 | Catalyzed metal foil and uses thereof | — | 2024-01-16 |
| 11765827 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Dale Kersten, George Dudnikov | 2023-09-19 |
| 11716819 | Asymmetrical electrolytic plating for a conductive pattern | Michael Riley Vinson | 2023-08-01 |
| 11549184 | Coating of nano-scaled cavities | Sunity Sharma | 2023-01-10 |
| 11399439 | Methods of forming high aspect ratio plated through holes and high precision stub removal in a printed circuit board | Douglas Ward Thomas, Dale Kersten | 2022-07-26 |
| 11304311 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Drew G. Doblar | 2022-04-12 |
| 11246226 | Laminate structures with hole plugs and methods of forming laminate structures with hole plugs | Dale Kersten | 2022-02-08 |
| 11142825 | Coating of nano-scaled cavities | Sunity Sharma | 2021-10-12 |
| 11076492 | Three dimensional circuit formation | Michael Riley Vinson, Haris Basit | 2021-07-27 |
| 10993333 | Methods of manufacturing ultra thin dielectric printed circuit boards with thin laminates | Toshiya Suzuki | 2021-04-27 |
| 10820427 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Drew G. Doblar | 2020-10-27 |
| 10811210 | Multilayer printed circuit board via hole registration and accuracy | Douglas Ward Thomas | 2020-10-20 |
| 10757819 | Method of forming a laminate structure having a plated through-hole using a removable cover layer | Dale Kersten | 2020-08-25 |
| 10667390 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Dale Kersten, George Dudnikov | 2020-05-26 |
| 10446356 | Multilayer printed circuit board via hole registration and accuracy | Douglas Ward Thomas | 2019-10-15 |
| 10362687 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Dale Kersten | 2019-07-23 |
| 10237983 | Method for forming hole plug | Dale Kersten | 2019-03-19 |
| 10201085 | Methods of forming blind vias for printed circuit boards | — | 2019-02-05 |
| 10188001 | Methods of forming high aspect ratio plated through holes and high precision stub removal in a printed circuit board | Douglas Ward Thomas, Dale Kersten | 2019-01-22 |
| 10123432 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Dale Kersten | 2018-11-06 |
| 9781844 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Dale Kersten | 2017-10-03 |
| 9781830 | Simultaneous and selective wide gap partitioning of via structures using plating resist | Dale Kersten, George Dudnikov | 2017-10-03 |