Issued Patents All Time
Showing 1–25 of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12306712 | Data storage device and method for identifying a failing area of memory based on a cluster of bit errors | Eran Sharon, Daniel Linnen, James Tom, Nika Yanuka, Tomer Eliash +1 more | 2025-05-20 |
| 12276706 | Multiple stage fuse circuitry for counting failure events | Daniel Linnen, Elliott Peter Rill | 2025-04-15 |
| 12224259 | Clamped semiconductor wafers and semiconductor devices | Daniel Linnen, Jayavel Pachamuthu | 2025-02-11 |
| 12205252 | Non-volatile memory die with bit-flip object insertion | Daniel Linnen, Ramanathan Muthiah, Nikita Thacker | 2025-01-21 |
| 12061542 | Memory device with latch-based neural network weight parity detection and trimming | Daniel Linnen, Ramanathan Muthiah | 2024-08-13 |
| 12051482 | Data storage device with noise injection | Daniel Linnen, Ramanathan Muthiah, Grant C. Mackey | 2024-07-30 |
| 12032959 | Non-volatile memory die with latch-based multiply-accumulate components | Daniel Linnen, Ramanathan Muthiah | 2024-07-09 |
| 12001693 | Data storage device with noise injection | Daniel Linnen, Ramanathan Muthiah | 2024-06-04 |
| 11908529 | Data storage device having over-voltage detection and protection | Daniel Linnen, Khanfer A. Kukkady | 2024-02-20 |
| 11836035 | Data storage device with data verification circuitry | Daniel Linnen, Aashish Sangoi, Judah Gamliel Hahn | 2023-12-05 |
| 11776637 | Voltage sharing across memory dies in response to a charge pump failure | Elliott Peter Rill, Daniel Linnen | 2023-10-03 |
| 11682595 | System and method for warpage detection in a CMOS bonded array | Daniel Linnen, Jayavel Pachamuthu | 2023-06-20 |
| 11640252 | Idle-power mitigation circuit | Daniel Linnen, Gunter Knestele, San A. Phong | 2023-05-02 |
| 11482292 | Non-volatile storage with processive writes | Daniel Linnen, Khanfer A. Kukkady, Preston A. Thomson | 2022-10-25 |
| 11462497 | Semiconductor device including coupled bond pads having differing numbers of pad legs | Daniel Linnen, Jayavel Pachamuthu | 2022-10-04 |
| 11456272 | Straight wirebonding of silicon dies | Daniel Linnen, Jayavel Pachamuthu | 2022-09-27 |
| 11450575 | System and method for die crack detection in a CMOS bonded array | Jayavel Pachamuthu, Daniel Linnen | 2022-09-20 |
| 11372056 | Circuit for detecting pin-to-pin leaks of an integrated circuit package | Dat Tran, Loc Tu, Nyi Nyi Thein | 2022-06-28 |
| 11222865 | Semiconductor device including vertical bond pads | Daniel Linnen, Jayavel Pachamuthu | 2022-01-11 |
| 11195820 | Semiconductor device including fractured semiconductor dies | Daniel Linnen, Jayavel Pachamuthu, Narendhiran Cr, Jay Dholakia, Everett Lyons, IV +2 more | 2021-12-07 |
| 11086539 | Mapping consecutive logical block addresses to consecutive good blocks in memory device | Dat Tran, Loc Tu | 2021-08-10 |
| 10991447 | Clock frequency counting during high-voltage operations for immediate leakage detection and response | Daniel Linnen, Avinash Rajagiri, Dongxiang Liao | 2021-04-27 |
| 10984883 | Systems and methods for capacity management of a memory system | Sowjanya Tungala, Sini Balakrishnan, Sowjanya Sunkavelli, Sridhar Yadala, Dat Tran +1 more | 2021-04-20 |
| 10943662 | Different word line programming orders in non-volatile memory for error recovery | Daniel Linnen, Jayavel Pachamuthu | 2021-03-09 |
| 10908210 | Die crack detection | Naresh Battula, Chang Hua Siau | 2021-02-02 |