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Semiconductor memory device and method for controlling write timing of parity data |
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2019-09-24 |
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Semiconductor memory device including stacked chips and memory module having the same |
Jong-Wan Kim, Sung Chul Park |
2019-03-12 |
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Method of operating memory device and methods of writing and reading data in memory device |
Jong-Pil Son, Young-Soo Sohn, Uk-Song Kang, Chul-Woo Park, Jung-Hwan Choi +1 more |
2017-03-07 |
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Concentrated address detecting method of semiconductor device and concentrated address detecting circuit using the same |
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Method of configuring a semiconductor integrated circuit involving capacitors having a width equal to the length of active resistors |
Sung Hoon Kim |
2012-11-06 |
| 8010765 |
Semiconductor memory device and method for controlling clock latency according to reordering of burst data |
Joo S. Choi, Won-Chang Jung, Hi-Choon Lee, Sung-min Yim, Chul-Woo Park |
2011-08-30 |
| 7580294 |
Semiconductor memory device comprising two rows of pads |
Du-Yeul Kim, Yong-Gyu Chu, Jun-Hyung Kim |
2009-08-25 |
| 7408817 |
Voltage generating circuit, semiconductor memory device comprising the same, and voltage generating method |
Jun-Hyung Kim, Seong-Jin Jang |
2008-08-05 |
| 6927488 |
Semiconductor memory device |
Jei-Hwan Yoo, Byung-Chul Kim |
2005-08-09 |
| 6529432 |
Semiconductor memory device and data read method thereof |
Byung-Chul Kim |
2003-03-04 |
| 6310813 |
Methods and apparatus for bypassing refreshing of selected portions of DRAM devices |
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2001-10-30 |
| 6201745 |
Semiconductor memory device with redundant row substitution architecture and a method of driving a row thereof |
Hoon Ryu |
2001-03-13 |
