Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12321296 | Multi-protocol IO infrastructure for a flexible storage platform | Fred Worley, Harry Rogers, Zhan Ping, Michael Scriber | 2025-06-03 |
| 11907150 | Multi-protocol IO infrastructure for a flexible storage platform | Fred Worley, Harry Rogers, Zhan Ping, Michael Scriber | 2024-02-20 |
| 11003609 | Multi-protocol IO infrastructure for a flexible storage platform | Fred Worley, Harry Rogers, Zhan Ping, Michael Scriber | 2021-05-11 |
| 10929325 | PCIE lane aggregation over a high speed link | Nirmal Saxena | 2021-02-23 |
| 10776299 | Multi-protocol I/O infrastructure for a flexible storage platform | Fred Worley, Harry Rogers, Zhan Ping, Michael Scriber | 2020-09-15 |
| 10649667 | Mitigating GC effect in a RAID configuration | Oscar P. Pinto | 2020-05-12 |
| 10572425 | PCIe lane aggregation over a high speed link | Nirmal Saxena | 2020-02-25 |
| 10360166 | Multi-protocol io infrastructure for a flexible storage platform | Fred Worley, Harry Rogers, Zhan Ping, Michael Scriber | 2019-07-23 |
| 10235318 | PCIe lane aggregation over a high speed link | Nirmal Saxena | 2019-03-19 |
| 10114778 | Multi-protocol IO infrastructure for a flexible storage platform | Fred Worley, Harry Rogers, Zhan Ping, Michael Scriber | 2018-10-30 |
| 10002586 | Compression of display data stored locally on a GPU | Koen Bennebroek, Karthik Bhat, Stefano A. Pescador, David G. Reed, Brad W. Simeral +1 more | 2018-06-19 |
| 9846669 | PCIe lane aggregation over a high speed link | Nirmal Saxena | 2017-12-19 |
| 9804787 | Mitigating GC effect in a raid configuration | Oscar P. Pinto | 2017-10-31 |
| 9430437 | PCIE lane aggregation over a high speed link | Nirmal Saxena | 2016-08-30 |
| 9250831 | Isolated shared memory architecture (iSMA) | Nirmal Saxena, David T. Wang | 2016-02-02 |
| 8489851 | Processing of read requests in a memory controller using pre-fetch mechanism | Balajee Vamanan, Tukaram Methar, Mrudula Kanuri | 2013-07-16 |
| 8261121 | Command latency reduction and command bandwidth maintenance in a memory circuit | Tukaram Methar, Balajee Vamanan | 2012-09-04 |