Issued Patents All Time
Showing 26–50 of 56 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10795764 | Method to deliver in-DRAM ECC information through DDR bus | Dimin Niu, Hongzhong Zheng, Hyun-Joong Kim, Won-Hyung Song, Jangseok Choi | 2020-10-06 |
| 10762000 | Techniques to reduce read-modify-write overhead in hybrid DRAM/NAND memory | Heehyun Nam, Youngsik Kim, Youngjin Cho, Dimin Niu, Hongzhong Zheng | 2020-09-01 |
| 10705969 | Dedupe DRAM cache | Andrew Chang, Dongyan Jiang, Hongzhong Zheng | 2020-07-07 |
| 10621119 | Asynchronous communication protocol compatible with synchronous DDR protocol | Dimin Niu, Hongzhong Zheng, Sun-Young Lim, Indong Kim, Jangseok Choi +1 more | 2020-04-14 |
| 10592114 | Coordinated in-module RAS features for synchronous DDR compatible memory | Dimin Niu, Hongzhong Zheng, Sun-Young Lim, Indong Kim, Jangseok Choi | 2020-03-17 |
| 10558388 | Memory system and method of controlling the same | Dimin Niu, Hongzhong Zheng, Craig Hanson, Sun-Young Lim, Indong Kim | 2020-02-11 |
| 10552256 | Morphable ECC encoder/decoder for NVDIMM over DDR channel | Dimin Niu, Hongzhong Zheng | 2020-02-04 |
| 10504572 | Methods for addressing high capacity SDRAM-like memory without increasing pin cost | Dimin Niu, Hongzhong Zheng, Sun-Young Lim, Indong Kim, Jangseok Choi | 2019-12-10 |
| 10496543 | Virtual bucket multiple hash tables for efficient memory in-line deduplication application | Frederic Sala, Chaohong Hu, Hongzhong Zheng, Dimin Niu | 2019-12-03 |
| 10437482 | Coordinated near-far memory controller for process-in-HBM | Dimin Niu, Hongzhong Zheng | 2019-10-08 |
| 10394719 | Refresh aware replacement policy for volatile memory cache | Dimin Niu, Hongzhong Zheng | 2019-08-27 |
| 10394648 | Method to deliver in-DRAM ECC information through DDR bus | Dimin Niu, Hongzhong Zheng, Hyun-Joong Kim, Won-Hyung Song, Jangseok Choi | 2019-08-27 |
| 10347306 | Self-optimized power management for DDR-compatible memory systems | Dimin Niu, Hongzhong Zheng, Craig Hanson, Sun-Young Lim, Indong Kim +1 more | 2019-07-09 |
| 10318434 | Optimized hopscotch multiple hash tables for efficient memory in-line deduplication application | Frederic Sala, Chaohong Hu, Hongzhong Zheng, Dimin Niu | 2019-06-11 |
| 10282294 | Mitigating DRAM cache metadata access overhead with SRAM metadata cache and bloom filter | Dimin Niu, Hongzhong Zheng | 2019-05-07 |
| 10268541 | DRAM assist error correction mechanism for DDR SDRAM interface | Dimin Niu, Hongzhong Zheng, Hyun-Joong Kim, Won-Hyung Song, Jangseok Choi | 2019-04-23 |
| 10223252 | Hybrid DRAM array including dissimilar memory cells | Dimin Niu, Hongzhong Zheng | 2019-03-05 |
| 10180906 | HBM with in-memory cache manager | Tyler Stocksdale, Hongzhong Zheng | 2019-01-15 |
| 10114560 | Hybrid memory controller with command buffer for arbitrating access to volatile and non-volatile memories in a hybrid memory group | Dimin Niu, Hongzhong Zheng, Sun-Young Lim, Indong Kim | 2018-10-30 |
| 10049717 | Wear leveling for storage or memory device | Dimin Niu, Hongzhong Zheng, Kyung-Chang Ryoo | 2018-08-14 |
| 10013212 | System architecture with memory channel DRAM FPGA module | Hongzhong Zheng | 2018-07-03 |
| 9983821 | Optimized hopscotch multiple hash tables for efficient memory in-line deduplication application | Frederic Sala, Chaohong Hu, Hongzhong Zheng, Dimin Niu | 2018-05-29 |
| 9971511 | Hybrid memory module and transaction-based memory interface | Dimin Niu, Hongzhong Zheng | 2018-05-15 |
| 9904635 | High performance transaction-based memory systems | Hongzhong Zheng, Liang Yin | 2018-02-27 |
| 9846650 | Tail response time reduction method for SSD | Dimin Niu, Hongzhong Zheng | 2017-12-19 |