Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11699643 | Fan-out semiconductor package | Ik Jun Choi, Jae Ean LEE, Young Gwan Ko, Jung Soo Byun | 2023-07-11 |
| 10916495 | Fan-out semiconductor package | Ik Jun Choi, Jae Ean LEE, Young Gwan Ko, Jung Soo Byun | 2021-02-09 |
| 10817637 | System and method of designing integrated circuit by considering local layout effect | Naya Ha, Yong-durk Kim, Bong-Hyun Lee, Hyung-Ock Kim, Jae Hoon Kim | 2020-10-27 |
| 10811352 | Semiconductor package | — | 2020-10-20 |
| 10446478 | Semiconductor package | Dong Won Kang, Young Gwan Ko, Ik Jun Choi, Jung Soo Byun | 2019-10-15 |
| 10340263 | Integrated circuit for reducing ohmic drop in power rails | Hyo-sig Won, Chan Uk Shin, Kwon Chil Kang | 2019-07-02 |
| 9098670 | Double patterning layout design method | Tae-Joong Song, Jae-Ho Park | 2015-08-04 |
| 6861887 | Clocked-scan flip-flop for multi-threshold voltage CMOS circuit | Hyo-sig Won | 2005-03-01 |