Issued Patents All Time
Showing 126–150 of 159 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6768148 | Devices with active areas having increased ion concentrations adjacent to isolation structures | Chang-Hyun Cho, Sang-Hyeon Lee | 2004-07-27 |
| 6764941 | Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof | Won-Suk Yang, Yoo-Sang Hwang, Hong-Sik Jeong | 2004-07-20 |
| 6753227 | Method of fabricating MOS transistors | Chang-Hyun Cho, Gwan-Hyeob Koh | 2004-06-22 |
| 6737694 | Ferroelectric memory device and method of forming the same | Yoon-Jong Song | 2004-05-18 |
| 6727542 | Semiconductor memory device and method for manufacturing the same | Byung-Jun Park | 2004-04-27 |
| 6727156 | Semiconductor device including ferroelectric capacitor and method of manufacturing the same | Dong-Jin Jung | 2004-04-27 |
| 6713310 | Ferroelectric memory device using via etch-stop layer and method for manufacturing the same | Yoon-Jong Song, Sang-Woo Lee | 2004-03-30 |
| 6699762 | Methods of fabricating integrated circuit devices with contact hole alignment | Won-Suk Yang | 2004-03-02 |
| 6656790 | Method for manufacturing a semiconductor device including storage nodes of capacitor | Se-myeong Jang, Hong-Sik Jeong, Yoo-Sang Hwang | 2003-12-02 |
| 6613621 | Methods of forming self-aligned contact pads using a damascene gate process | Hyung-Soo Uh, Kyu-Hynn Lee, Tae-Young Chung, Yoo-Sang Hwang | 2003-09-02 |
| 6596626 | Method for arranging wiring line including power reinforcing line and semiconductor device having power reinforcing line | Won-Suk Yang, Jae-Young Lee, Chang-Hyun Cho | 2003-07-22 |
| 6594174 | Method for sensing data stored in a ferroelectric random access memory device | Mun-Kyu Choi, Byung-Gil Jeon | 2003-07-15 |
| 6562697 | Methods of implanting ions into different active areas to provide active areas having increased ion concentrations adjacent to isolation structures | Chang-Hyun Cho, Sang-Hyeon Lee | 2003-05-13 |
| 6518671 | Bit line landing pad and borderless contact on bit line stud with localized etch stop layer and manufacturing method thereof | Won-Suk Yang, Yoo-Sang Hwang, Hong-Sik Jeong | 2003-02-11 |
| 6515323 | Ferroelectric memory device having improved ferroelectric characteristics | Dong-Jin Jung | 2003-02-04 |
| 6496426 | Redundancy circuit of semiconductor memory device | Byung-Gil Jeon | 2002-12-17 |
| 6420744 | Ferroelectric capacitor and method for fabricating ferroelectric capacitor | Hyun-Ho Kim | 2002-07-16 |
| 6404001 | Multilevel conductive interconnections including capacitor electrodes for integrated circuit devices | Bon-Jae Koo | 2002-06-11 |
| 6391736 | Method for fabricating a capacitor of a semiconductor device and a capacitor made thereby | Hyung-Soo Uh, Sang-Ho Song | 2002-05-21 |
| 6388281 | Triple metal line 1T/1C ferroelectric memory device and method for fabrication thereof | Dong-Jin Jung | 2002-05-14 |
| 6350649 | Bit line landing pad and borderless contact on bit line stud with etch stop layer and manufacturing method thereof | Hong-Sik Jeong, Won-Suk Yang | 2002-02-26 |
| 6329249 | Method for fabricating a semiconductor device having different gate oxide layers | Won-Suk Yang, Jai-Hoon Sim, Jae-Kyu Lee | 2001-12-11 |
| 6297090 | Method for fabricating a high-density semiconductor memory device | — | 2001-10-02 |
| 6262446 | Methods of forming multilevel conductive interconnections including capacitor electrodes for integrated circuit devices | Bon-Jae Koo | 2001-07-17 |
| 6242332 | Method for forming self-aligned contact | Chang-Hyun Cho, Tae-Young Chung | 2001-06-05 |