Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11836097 | Memory device for adjusting memory capacity per channel and memory system including the same | Jae Won PARK, Sang Hoon Shin, Jae Hoon Jung | 2023-12-05 |
| 11769547 | Memory device transmitting and receiving data at high speed and low power | Byongmo Moon, Jihye Kim, Beomyong Kil, Sungoh Ahn | 2023-09-26 |
| 11295808 | Memory device transmitting and receiving data at high speed and low power | Byongmo Moon, Jihye Kim, Beomyong Kil, Sungoh Ahn | 2022-04-05 |
| 11239210 | Semiconductor die for determining load of through silicon via and semiconductor device including the same | SeungHan Woo, Reum Oh, Moonhee Oh, Bumsuk LEE | 2022-02-01 |
| 11010316 | Memory device for adjusting memory capacity per channel and memory system including the same | Jae Won PARK, Sang Hoon Shin, Jae Hoon Jung | 2021-05-18 |
| 10916525 | Semiconductor die for determining load of through silicon via and semiconductor device including the same | SeungHan Woo, Reum Oh, Moonhee Oh, Bumsuk LEE | 2021-02-09 |
| 10768824 | Stacked memory device and a memory chip including the same | Hak-Soo Yu, Reum Oh, Pavan Kumar Kasibhatla, Seok In Hong | 2020-09-08 |
| 10671464 | Memory device comprising status circuit and operating method thereof | Moonhee Oh, Reum Oh, Jaeyoun Youn | 2020-06-02 |
| 10592467 | Semiconductor memory device and method of operating a semiconductor device in a processor mode or a normal mode | Reum Oh, Hak-Soo Yu | 2020-03-17 |
| 10468092 | Memory device for controlling refresh operation by using cell characteristic flags | Ki-ho Hyun, Kyo-Min Sohn, Ho-Seok Seol | 2019-11-05 |
| 10410685 | Memory device for performing internal process and operating method thereof | Reum Oh, Pavan Kumar Kasibhatla | 2019-09-10 |
| 10331354 | Stacked memory device and a memory chip including the same | Hak-Soo Yu, Reum Oh, Pavan Kumar Kasibhatla, Seok In Hong | 2019-06-25 |
| 10319451 | Semiconductor device having chip ID generation circuit | Yang-gyoon Loh, Hyun Ki Kim, Yoon Jae JEONG | 2019-06-11 |
| 10262699 | Memory device for performing internal process and operating method thereof | Reum Oh, Pavan Kumar Kasibhatla | 2019-04-16 |
| 10242731 | Memory device for controlling refresh operation by using cell characteristic flags | Ki-ho Hyun, Kyo-Min Sohn, Ho-Seok Seol | 2019-03-26 |
| 10224114 | Semiconductor device using a parallel bit operation and method of operating the same | Hak-Soo Yu, Reum Oh, Seong-Young Seo, Soo-jung Rho | 2019-03-05 |
| 10083722 | Memory device for performing internal process and operating method thereof | Reum Oh, Pavan Kumar Kasibhatla | 2018-09-25 |
| 9601216 | Semiconductor device including redundancy cell array | Ho-Young Song, Yun-Young Lee | 2017-03-21 |
| 9343175 | Fuse data reading circuit having multiple reading modes and related devices, systems and methods | Gil-Su Kim, Jong Min Oh, Sung-Min Seo, Seong-Jin Jang | 2016-05-17 |
| 9287009 | Repair circuit and fuse circuit | Kyu-Chang Kang, Gil-Su Kim, Yun-Young Lee, Kyo-Min Sohn | 2016-03-15 |
| 9123407 | Devices and methods for deciding data read start | Sung-Min Seo, Ju-Seop Park | 2015-09-01 |
| 8897055 | Memory device, method of operating the same, and electronic device having the memory device | Gil-Su Kim, Jong Min Oh, Sung-Min Seo, Ho-Young Song, Yong Ho Cho | 2014-11-25 |
| 8804448 | Method of selecting anti-fuses and method of monitoring anti-fuses | Ju-Seop Park, Jong-Pil Son, Sin-Ho Kim, Hyoung-Joo Kim, Sung-Min Seo | 2014-08-12 |