Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10325058 | Method for verifying a layout designed for a semiconductor integrated circuit and a computer system for performing the same | Moo-Kyung Lee, Sunghoon Kim | 2019-06-18 |
| 10068913 | Three dimensional semiconductor devices | Sunghoon Kim | 2018-09-04 |