Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10431320 | Semiconductor memory device, method of testing the same and method of operating the same | Jong-Hyoung Lim, Chang-Soo Lee, Chung-Ki Lee | 2019-10-01 |
| 9053963 | Multiple well bias memory | Chung-Ki Lee, Hong-Sun Hwang, Jong-Hyoung Lim | 2015-06-09 |
| 8619484 | Semiconductor device, method of adjusting load capacitance for the same, and semiconductor system including the same | Jong-Hyoung Lim, Sang-Seok Kang | 2013-12-31 |
| 8558347 | Semiconductor devices and methods of manufacturing the same | Hyung-Dong Kim | 2013-10-15 |
| 8415225 | Methods of manufacturing semiconductor devices | Hyung-Dong Kim | 2013-04-09 |
| 7696048 | Method of improving gate resistance in a memory array | Seug-Gyu KIM | 2010-04-13 |
| 7385260 | Semiconductor device having silicide thin film and method of forming the same | Joon-Yong Joo, Kwang-Ok Koh, Sung-Bong Kim | 2008-06-10 |
| 7348231 | Methods of fabricating semiconductor devices having insulating layers with differing compressive stresses | Dong-Won Lee, Jun-Beom Park | 2008-03-25 |
| 7312144 | Unitary interconnection structures integral with a dielectric layer and fabrication methods thereof | Won-Seok Cho, Soon-Moon Jung, Sung-Bong Kim | 2007-12-25 |
| 7172944 | Method of fabricating a semiconductor device having an elevated source/drain | — | 2007-02-06 |
| 7151031 | Methods of fabricating semiconductor devices having gate insulating layers with differing thicknesses | Soon-Moon Jung | 2006-12-19 |
| 7002223 | Semiconductor device having elevated source/drain | — | 2006-02-21 |
| 6815275 | Methods for fabricating metal silicide structures using an etch stopping capping layer | Won-suek Cho, Byung-Jun Hwang | 2004-11-09 |
| 6806180 | Unitary interconnection structures integral with a dielectric layer | Won-Seok Cho, Soon-Moon Jung, Sung-Bong Kim | 2004-10-19 |
| 6767814 | Semiconductor device having silicide thin film and method of forming the same | Joon-Yong Joo, Kwang-Ok Koh, Sung-Bong Kim | 2004-07-27 |
| 6635539 | Method for fabricating a MOS transistor using a self-aligned silicide technique | Do Hyung Kim | 2003-10-21 |
| 6551887 | Method of forming a spacer | Joon-Yong Joo | 2003-04-22 |