Issued Patents All Time
Showing 1–20 of 20 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11996846 | Latch circuit, flip-flop circuit including the same | Byoung Gon Kang, Woo-Kyu Kim, Tae Jun Yoo | 2024-05-28 |
| 11955471 | Integrated circuits having cross-couple constructs and semiconductor devices including integrated circuits | Jung-Ho Do, Jin Young Lim, Tae-Joong Song, Jong-Hoon Jung | 2024-04-09 |
| 11387817 | Latch circuit, flip-flop circuit including the same | Byoung Gon Kang, Woo-Kyu Kim, Tae Jun Yoo | 2022-07-12 |
| 11335673 | Integrated circuits having cross-couple constructs and semiconductor devices including integrated circuits | Jung-Ho Do, Jin Young Lim, Tae-Joong Song, Jong-Hoon Jung | 2022-05-17 |
| 11287474 | Scan flip-flop and scan test circuit including the same | Ha-Young Kim, Sung-we Cho, Jae Ha Lee | 2022-03-29 |
| 11189639 | Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped for mitigating electromigration | Ha-Young Kim, Chang Beom KIM, Hyun-jeong Roh, Tae-Joong Song, Sung-we Cho | 2021-11-30 |
| 11101267 | Integrated circuit including multiple-height cell and method of manufacturing the integrated circuit | Jin Young Lim, Jae-Ho Park, Sang-hoon Baek, Hyeon Gyu You | 2021-08-24 |
| 11031385 | Standard cell for removing routing interference between adjacent pins and device including the same | Jae-Woo Seo, Jin Tae Kim, Tae-Joong Song, Hyoung-Suk Oh, Keun-Ho Lee +1 more | 2021-06-08 |
| 10651201 | Integrated circuit including interconnection and method of fabricating the same, the interconnection including a pattern shaped and/or a via disposed for mitigating electromigration | Ha-Young Kim, Chang Beom KIM, Hyun-jeong Roh, Tae-Joong Song, Sung-we Cho | 2020-05-12 |
| 10553574 | Standard cell for removing routing interference between adjacent pins and device including the same | Jae-Woo Seo, Jin Tae Kim, Tae-Joong Song, Hyoung-Suk Oh, Keun-Ho Lee +1 more | 2020-02-04 |
| 10429443 | Scan flip-flop and scan test circuit including the same | Ha-Young Kim, SUNG-WEE CHO, Jae Ha Lee | 2019-10-01 |
| 10192860 | Engineering change order (ECO) cell, layout thereof and integrated circuit including the ECO cell | Jae-Woo Seo | 2019-01-29 |
| 10108772 | Methods of generating integrated circuit layout using standard cell library | Sang-hoon Baek, Jae-Woo Seo, Gi-young Yang, SUNG-WEE CHO | 2018-10-23 |
| 9960768 | Integrated circuit and semiconductor device including the same | Jae-Woo Seo, Min-Ho Park | 2018-05-01 |
| 9831877 | Integrated circuit and semiconductor device including the same | Jae-Woo Seo | 2017-11-28 |
| 9753086 | Scan flip-flop and scan test circuit including the same | Ha-Young Kim, SUNG-WEE CHO, Jae Ha Lee | 2017-09-05 |
| 9665678 | Method and program for designing integrated circuit | Sung-we Cho, Ha-Young Kim, Jae-Woo Seo, Jin Tae Kim | 2017-05-30 |
| 9460259 | Methods of generating integrated circuit layout using standard cell library | Sang-hoon Baek, Jae-Woo Seo, Gi-young Yang, SUNG-WEE CHO | 2016-10-04 |
| 9379705 | Integrated circuit and semiconductor device including the same | Jae-Woo Seo, Min-Ho Park | 2016-06-28 |
| 8952423 | Semiconductor device having decoupling capacitors and dummy transistors | Joong Won Jeon, Hee-Sung Kang, Dae Ho Yoon, Suk-Joo Lee | 2015-02-10 |