Issued Patents All Time
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7630223 | Memory device and method of arranging signal and power lines | — | 2009-12-08 |
| 6525417 | Integrated circuits having reduced step height by using dummy conductive lines | Kye-hyun Kyung | 2003-02-25 |
| 6372626 | Method of reducing step heights in integrated circuits by using dummy conductive lines, and integrated circuits fabricated thereby | Kye-hyun Kyung | 2002-04-16 |