Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7095655 | Dynamic matching of signal path and reference path for sensing | Yoram Betser, Yair Sofer | 2006-08-22 |
| 7064983 | Method for programming a reference cell | Ron Eliyahu, Ameet Lann, Boaz Eitan | 2006-06-20 |
| 7062619 | Mass storage device architecture and operation | Ran Dvir, Zeev Cohen | 2006-06-13 |
| 6975536 | Mass storage array and methods for operation thereof | Ran Dvir, Zeev Cohen | 2005-12-13 |
| 6954382 | Multiple use memory chip | Boaz Eitan | 2005-10-11 |
| 6928527 | Look ahead methods and apparatus | Zeev Cohen, Ran Dvir | 2005-08-09 |
| 6917544 | Multiple use memory chip | Boaz Eitan | 2005-07-12 |
| 6885585 | NROM NOR array | Boaz Eitan | 2005-04-26 |
| 6864739 | Charge pump stage with body effect minimization | Joseph Shor, Yan Polansky | 2005-03-08 |
| 6829172 | Programming of nonvolatile memory cells | Ilan Bloom, Boaz Eitan, Zeev Cohen, David Finzi | 2004-12-07 |
| 6791396 | Stack element circuit | Joseph Shor | 2004-09-14 |
| 6781897 | Defects detection | Ran Dvir, Zeev Cohen | 2004-08-24 |
| 6677805 | Charge pump stage with body effect minimization | Joseph Shor, Yan Polansky | 2004-01-13 |
| 6636440 | Method for operation of an EEPROM array, including refresh thereof | Ron Eliyahu, Shai Eisen, Boaz Eitan | 2003-10-21 |
| 6633496 | Symmetric architecture for memory cells having widely spread metal bit lines | Boaz Eitan | 2003-10-14 |
| 6633499 | Method for reducing voltage drops in symmetric array architectures | Boaz Eitan | 2003-10-14 |
| 6614692 | EEPROM array and method for operation thereof | Ron Eliyahu, Ilan Bloom, Boaz Eitan | 2003-09-02 |
| 6584017 | Method for programming a reference cell | Ron Eliyahu, Ameet Lann, Boaz Eitan | 2003-06-24 |
| 6577514 | Charge pump with constant boosted output voltage | Joseph Shor, Yair Sofer | 2003-06-10 |
| 6535434 | Architecture and scheme for a non-strobed read sequence | Yair Sofer, Ron Eliyahu, Boaz Eitan | 2003-03-18 |
| 6490204 | Programming and erasing methods for a reference cell of an NROM array | Ilan Bloom, Boaz Eitan | 2002-12-03 |
| 6448750 | Voltage regulator for non-volatile memory with large power supply rejection ration and minimal current drain | Joseph Shor, Yair Sofer | 2002-09-10 |
| 6430077 | Method for regulating read voltage level at the drain of a cell in a symmetric array | Boaz Eitan | 2002-08-06 |
| 6396741 | Programming of nonvolatile memory cells | Ilan Bloom, Boaz Eitan, Zeev Cohen, David Finzi | 2002-05-28 |
| 6292394 | Method for programming of a semiconductor memory cell | Zeev Cohen, Boaz Eitan | 2001-09-18 |