BE

Boaz Eitan

SS Saifun Semiconductors: 75 patents #1 of 35Top 3%
WI Waferscale Integration: 30 patents #1 of 25Top 4%
SI Spansion Israel: 8 patents #1 of 24Top 5%
EM Eitan Medical: 7 patents #2 of 18Top 15%
QM Q-Core Medical: 5 patents #3 of 26Top 15%
TS Tower Semiconductors: 4 patents #1 of 18Top 6%
AM American Microsystems: 2 patents #11 of 62Top 20%
Infineon Technologies Ag: 1 patents #4,439 of 7,486Top 60%
Cypress Semiconductor: 1 patents #1,072 of 1,852Top 60%
IN Intel: 1 patents #18,218 of 30,777Top 60%
📍 Hofit, CA: #1 of 1 inventorsTop 100%
Overall (All Time): #8,490 of 4,157,543Top 1%
129
Patents All Time

Issued Patents All Time

Showing 51–75 of 129 patents

Patent #TitleCo-InventorsDate
6937521 Programming and erasing methods for a non-volatile memory cell Dror Avni 2005-08-30
6928001 Programming and erasing methods for a non-volatile memory cell Dror Avni 2005-08-09
6917544 Multiple use memory chip Eduardo Maayan 2005-07-12
6888757 Method for erasing a memory cell Eli Lusky 2005-05-03
6885585 NROM NOR array Eduardo Maayan 2005-04-26
6828625 Protective layer in memory device and method therefor Iian Bloom 2004-12-07
6829172 Programming of nonvolatile memory cells Ilan Bloom, Zeev Cohen, David Finzi, Eduardo Maayan 2004-12-07
6803279 NROM fabrication method 2004-10-12
6803299 Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping 2004-10-12
6768165 Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping 2004-07-27
6704217 Symmetric segmented memory array architecture 2004-03-09
6700818 Method for operating a memory device Assaf Shappir, Dror Avni 2004-03-02
6664588 NROM cell with self-aligned programming and erasure areas 2003-12-16
6649972 Two bit non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping 2003-11-18
6643181 Method for erasing a memory cell Yair Sofer 2003-11-04
6636440 Method for operation of an EEPROM array, including refresh thereof Eduardo Maayan, Ron Eliyahu, Shai Eisen 2003-10-21
6633496 Symmetric architecture for memory cells having widely spread metal bit lines Eduardo Maayan 2003-10-14
6633499 Method for reducing voltage drops in symmetric array architectures Eduardo Maayan 2003-10-14
6627555 Method and circuit for minimizing the charging effect during manufacture of semiconductor devices Ilan Bloom 2003-09-30
6614692 EEPROM array and method for operation thereof Ron Eliyahu, Eduardo Maayan, Ilan Bloom 2003-09-02
6583007 Reducing secondary injection effects 2003-06-24
6584017 Method for programming a reference cell Eduardo Maayan, Ron Eliyahu, Ameet Lann 2003-06-24
6566699 Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping 2003-05-20
6552387 Non-volatile electrically erasable and programmable semiconductor memory cell utilizing asymmetrical charge trapping 2003-04-22
6535434 Architecture and scheme for a non-strobed read sequence Eduardo Maayan, Yair Sofer, Ron Eliyahu 2003-03-18